PNP ESD Protection Layout With Graded Buried Layer Breakdown Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Integrated circuits in semiconductor devices are vulnerable to damage from electrostatic discharge (ESD) events, which can cause high voltage breakdown and irreversible damage due to the flow of large currents during a short period.

Innovation Solution

The semiconductor device incorporates an ESD protection device with a PNP cell structure, featuring a substrate with a n-doped buried layer (NBL) and an epitaxial layer with a PNP device. The first p-doped region is aligned vertically with the second NBL portion, which has a lower n-doping level than the first and third NBL portions, enhancing the breakdown voltage without increasing die area or resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a uniformly doped NBL with higher n-doping level is used, then the resistance is reduced, but the breakdown voltage decreases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidESD protection capability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The NBL is divided into three portions with different n-doping levels: first and third portions have higher doping levels to reduce resistance, while the second portion has a lower doping level to increase breakdown voltage. This local differentiation of doping levels allows simultaneous optimization of both resistance and breakdown voltage characteristics.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The NBL is segmented into three distinct portions along the lateral direction, each with tailored doping levels. The first NBL portion (higher doping) connects to the first p-doped region, the second NBL portion (lower doping) connects to the second p-doped region, and the third NBL portion (higher doping) provides additional resistance reduction. This segmentation enables independent optimization of different functional requirements.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the die area is increased to improve ESD protection, then the breakdown voltage increases, but the device size increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddie area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The doping level parameter of the NBL is changed spatially across different portions. By varying the n-doping level from high (first and third portions) to low (second portion) and back to high, the breakdown voltage is increased without requiring additional die area. This parameter modulation allows achieving higher breakdown voltage within the same footprint.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the resistance is increased to improve breakdown voltage, then the ESD protection performance improves, but the signal transmission deteriorates

Engineering Contradiction:
Improvebreakdown voltageVSAvoidsignal degradation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

Different portions of the NBL have different doping levels optimized for different functions: the first and third NBL portions with higher doping levels minimize resistance for signal transmission, while the second NBL portion with lower doping level maximizes breakdown voltage for ESD protection. This local quality differentiation resolves the contradiction between resistance and breakdown voltage.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively increases the breakdown voltage of the ESD protection device, providing enhanced protection against ESD events while maintaining the same die area and resistance as similar devices with uniformly doped NBLs.

Implementation Method 1

a n-doped buried layer, NBL, extending laterally at a surface of the substrate, wherein the NBL comprises a first NBL portion, a second NBL portion and a third NBL portion laterally arranged at the surface of the substrate with the second NBL portion positioned between the first NBL portion and the third NBL portion, wherein the second NBL portion has a second n-doping level that is less than a first n-doping level of the first NBL portion and less than a third n-doping level of the third NBL portion

Methodology Applied
Scientific EffectElectric Field: Electric Field

Data Source

PatentEP4507000A1An electrostatic discharge protection device and a method
Publication Date: 2025.02.12 NXP USA INC
  • EP4507000A1 patent drawingFigure 1
  • EP4507000A1 patent drawingFigure 2
  • EP4507000A1 patent drawingFigure 3

AI summary

A semiconductor device comprising an electrostatic discharge, ESD, protection device, the ESD protection device comprising a first PNP cell comprising: a substrate comprising a n-doped buried layer, NBL, extending laterally at a surface of the substrate, wherein the NBL comprises a first NBL portion, a second NBL portion and a third NBL portion laterally arranged at the surface of the substrate with the second NBL portion positioned between the first NBL portion and the third NBL portion, wherein the second NBL portion has a second n-doping level that is less than a first n-doping level of the first NBL portion and less than a third n-doping level of the third NBL portion; an epitaxial layer arranged on the surface of the substrate and comprising a PNP device comprising: a first p-doped region; a second p-doped region; and a n-doped region positioned between the first p-doped region and the second p-doped region, wherein the first p-doped region is aligned with the second NBL portion.