Neuron Circuit Using P-N-P-N Diode Without External Bias
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Solution Overview
Problem
Conventional neuron circuits face limitations in power consumption, complexity, and integration due to their structural design, which requires external bias and numerous transistors, making them inefficient for neuromorphic applications.
Innovation Solution
A neuron circuit utilizing a p-n-p-n diode and MOSFETs, which generates spikes without external bias, using a capacitor to integrate synapse current and induce a latch-up phenomenon for efficient operation, reducing the number of transistors and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional neuron circuits use external bias voltages and numerous transistors to ensure stability and signal processing, then reliability is improved, but power consumption increases and device complexity increases
Solution Approach 1:
The patent removes the external bias voltage requirement from the neuron circuit by extracting the bias generation function and replacing it with a self-biasing mechanism using the p-n-p-n diode's inherent latch-up phenomenon. This eliminates the need for additional bias voltage supply circuits, reducing power consumption while maintaining operational reliability
Solution Approach 2:
The patent combines multiple functions into the p-n-p-n diode structure, which simultaneously provides signal integration, threshold comparison, spike generation, and self-biasing capabilities. By merging these functions into a single device with latch-up behavior, the circuit achieves reliable neuron operation with significantly reduced transistor count and lower power consumption
2Reliability
If conventional neuron circuits use numerous transistors for signal integration and spike generation, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent merges the functions of multiple transistors (integration capacitor, comparison logic, spike generator) into a single p-n-p-n diode structure that exploits the latch-up phenomenon. This consolidation maintains the essential neuron functions while dramatically reducing the transistor count from conventional designs to just a few transistors
Solution Approach 2:
The patent changes the operating parameters by utilizing the p-n-p-n diode's latch-up voltage threshold as the spike generation trigger. By operating in the latch-up regime rather than conventional transistor switching, the circuit achieves reliable neuron function with fewer components and simpler structure
3Reliability
If conventional neuron circuits use external bias voltages for operation, then reliability is improved, but ease of operation worsens due to additional control requirements
Solution Approach 1:
The patent implements self-service by enabling the neuron circuit to generate its own bias voltage through the p-n-p-n diode's latch-up phenomenon. The circuit automatically establishes the required voltage levels during operation without external intervention, eliminating the need for bias voltage control circuits and simplifying the overall system operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves low power consumption, high integration, and simplified structure, enabling efficient operation in spiking neural networks with reduced transistor count and improved energy efficiency.
Implementation Method 1
a neuron circuit, wherein the neuron circuit generates potential by charging current input from synapses through a capacitor
Implementation Method 2
when the generated potential exceeds a critical value, the neuron circuit generates and outputs a spike voltage corresponding to the generated potential using a p-n-p-n diode connected to the capacitor
Data Source
AI summary
The present disclosure relates to a novel neuron circuit using a p-n-p-n diode to realize small size and low power consumption. The neuron circuit according to one embodiment of the present disclosure may generate potential by charging current input from synapses through a capacitor. In this case, when the generated potential exceeds a critical value, the neuron circuit may generate and output a spike voltage corresponding to the generated potential using a p-n-p-n diode connected to the capacitor.