Polarity-Written Memory Cells: Varying-Polarity Reads Against Read Disturb
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Solution Overview
Problem
Polarity-written memory cells experience voltage drift and read disturb due to repeated application of read voltages with the same polarity, leading to decreased performance and increased bit error rates.
Innovation Solution
Varying the polarity of read voltages randomly or according to a pattern to avoid soft-programming and mitigate the effects of voltage drift and read disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If read voltages with the same polarity are repeatedly applied to polarity-written memory cells, then read operations can be performed, but voltage drift and read disturb occur leading to increased bit error rates
Solution Approach 1:
The patent applies periodic action by alternating the polarity of read voltages between positive and negative in successive read operations. This periodic polarity switching prevents cumulative voltage drift and read disturb effects that would occur with repeated same-polarity reads, thereby maintaining reliability while enabling continuous read operations.
Solution Approach 2:
The patent changes the parameter of read voltage polarity systematically. By switching between positive and negative polarities for successive reads, the patent modifies the electrical characteristics of read operations to prevent the harmful accumulation of voltage drift and read disturb, thus resolving the contradiction between maintaining read capability and preventing bit errors.
2Ease of operation
If read voltages are applied frequently to sense memory cell states, then information can be accessed, but read disturb effects increase causing performance degradation
Solution Approach 1:
The patent implements periodic polarity reversal in read operations, alternating between positive and negative voltages. This periodic action allows frequent information access while preventing the cumulative read disturb that would degrade memory performance, as the alternating polarities cancel out harmful effects on the memory cells.
Solution Approach 2:
The patent applies beforehand cushioning by using alternating polarity reads to preemptively counteract read disturb effects before they accumulate to harmful levels. The alternating negative reads cushion against the damage caused by positive reads, protecting the memory cells from performance degradation even with frequent access operations.
3Device complexity
If same-polarity read voltages are used for simplified control, then read operations are easier to implement, but voltage drift accumulates reducing read window stability
Solution Approach 1:
The patent applies periodic polarity switching to read voltages, creating a simple alternating pattern between positive and negative reads. This periodic approach maintains operational simplicity while effectively preventing voltage drift accumulation, thereby preserving read window stability without significantly increasing control complexity.
Solution Approach 2:
The patent uses inversion by alternating the polarity of read voltages between positive and negative. This inversion strategy simplifies the overall control scheme compared to complex adaptive voltage adjustment, while simultaneously maintaining read window stability by preventing drift accumulation through the alternating polarity pattern.
Data Source
AI summary
Methods, systems, and devices for varying-polarity read operations for polarity-written memory cells are described. Memory cells may be programmed to store different logic values based on applying write voltages of different polarities to the memory cells. A memory device may read the logic values based on applying read voltages to the memory cells, and the polarity of the read voltages may vary such that at least some read voltages have one polarity and at least some read voltages have another polarity. The read voltage polarity may vary randomly or according to a pattern and may be controlled by the memory device or by a host device for the memory device.