Polycrystalline Silicon Channel Doping for Low-Hysteresis Displays
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Solution Overview
Problem
Existing display devices face issues with hysteresis and image retention, which affect the performance and reliability of transistors in these devices.
Innovation Solution
A display device is designed with a semiconductor layer that includes a channel region with specific impurity doping, where a Group III element impurity is located at the surface of the channel and a Group V element impurity is located at the bottom, improving transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single type of impurity is doped into the channel region, then the manufacturing process is simple, but hysteresis and image retention issues occur
Solution Approach 1:
The patent applies local quality by doping different types of impurities at different locations within the channel region. Specifically, a first type of impurity (e.g., phosphorus) is doped into a first region of the channel, while a second type of impurity (e.g., boron) is doped into a second region of the channel. This spatial differentiation of impurity types allows each region to contribute differently to the overall transistor performance, reducing hysteresis and image retention effects while maintaining manufacturing feasibility through targeted doping processes.
2Reliability
If the channel region is doped with impurities to improve transistor characteristics, then transistor performance improves, but hysteresis and image retention issues arise
Solution Approach 1:
The patent implements local quality by creating distinct impurity regions within the channel. A first region contains a first type of impurity (such as phosphorus) that provides beneficial doping effects, while a second region contains a second type of impurity (such as boron) that counteracts hysteresis and image retention. This localized differentiation allows the channel to simultaneously achieve improved transistor characteristics and reduced harmful effects that would result from uniform impurity doping.
3Ease of manufacture
If polycrystalline silicon is used for the semiconductor layer, then manufacturing flexibility is improved, but precise control of impurity distribution becomes more difficult
Solution Approach 1:
The patent applies segmentation by dividing the channel region into multiple distinct regions (first region and second region), each receiving a specific type of impurity doping. This segmentation strategy works effectively with polycrystalline silicon because the discrete region definition allows for controlled impurity distribution even in the polycrystalline structure. The channel is thus segmented both spatially and chemically, enabling precise control over the electrical characteristics of different channel portions while maintaining the manufacturing advantages of polycrystalline silicon.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces hysteresis and image retention issues, enhancing the overall performance and reliability of the display device's transistors.
Implementation Method 1
The channel includes: a first region containing a first impurity; and a second region containing a second impurity different from the first impurity
Data Source
AI summary
A display device includes: a substrate; a semiconductor layer on the substrate, and including a channel of at least one transistor; a first insulating layer on the semiconductor layer; and a gate electrode on the first insulating layer. The semiconductor layer includes polycrystalline silicon, and the channel includes: a first region containing a first impurity; and a second region containing a second impurity different from the first impurity.


