Polycrystalline Silicon TFT Active Layer Thickness Control

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Solution Overview

Problem

Existing LCD devices face issues with thin film transistor property degradation due to thickness differences in the active layer, leading to instability and low carrier mobility, which affects production efficiency and suitability for driving circuits.

Innovation Solution

A method is introduced that forms a buffer layer on a substrate with an inorganic insulating material, followed by sequential layers of a gate electrode, gate insulating layer, active layer, and auxiliary active layer, using polycrystalline silicon and amorphous silicon to improve transistor reliability and reduce production costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the active layer thickness is increased to prevent property degradation, then transistor reliability improves, but production time increases due to longer deposition time

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidproduction time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The invention changes the material parameter from amorphous silicon to polycrystalline silicon, which fundamentally alters the deposition characteristics and allows for thinner, more uniform layers that achieve the desired reliability without increasing production time

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention uses a composite structure with multiple silicon layers (intrinsic and extrinsic polycrystalline silicon layers) with different properties, where each layer contributes to overall transistor performance while maintaining optimal thickness for fast production

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If amorphous silicon is used for the active layer, then manufacturing is easier, but carrier mobility remains low affecting driving circuit suitability

Engineering Contradiction:
Improvemanufacturing easeVSAvoidcarrier mobility
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention changes the crystalline structure parameter of the silicon material from amorphous to polycrystalline, which significantly improves carrier mobility while maintaining compatibility with standard semiconductor manufacturing processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention creates different regions with different silicon crystal structures (intrinsic and extrinsic polycrystalline silicon) in specific locations within the active layer, optimizing carrier mobility in the channel region while maintaining ease of manufacture through standardized processes

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If thickness difference is created in the active layer during manufacturing, then manufacturing process is simpler, but transistor properties degrade

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidactive layer thickness uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The invention ensures uniform thickness across the active layer by using polycrystalline silicon deposition techniques that provide better thickness control compared to amorphous silicon, eliminating the need for compensating thickness differences

Inventive Principle:
Principle #33Homogeneity

Solution Approach 2:

The invention performs preliminary crystallization of the silicon layer before subsequent processing steps, establishing uniform thickness and desired electrical properties early in the manufacturing process, which prevents property degradation without complicating later steps

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8198631B2Display device and method of fabricating the same
Publication Date: 2012.06.12 LG DISPLAY CO LTD
  • US8198631B2 patent drawing
  • US8198631B2 patent drawing
  • US8198631B2 patent drawing

AI summary

Disclosed is a method of fabricating a display device that includes forming a buffer layer; forming a gate electrode of extrinsic polycrystalline silicon, a gate insulating layer, an active layer of intrinsic polycrystalline silicon and an auxiliary active layer of intrinsic amorphous silicon on the buffer layer; forming an ohmic contact layer of extrinsic amorphous silicon and contacting the auxiliary active layer, source and drain electrodes and a data line; patterning a first passivation layer, an insulating interlayer and the gate insulating layer to form a gate contact hole exposing the gate electrode; forming a gate line on the first passivation layer, made of a metal material, and contacting the gate electrode through the gate contact hole; forming a second passivation layer on the gate line; patterning the first and second passivation layers to form a drain contact hole exposing the drain electrode; and forming a pixel electrode on the second passivation layer in the pixel region and contacting the drain electrode through the drain contact hole.