Polycrystalline Thin Film Transistor Array Panel Crystallization
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Solution Overview
Problem
Current thin film transistor array panels face challenges in achieving high field effect mobility and optical stability while maintaining simple manufacturing processes, with amorphous semiconductor thin films having low mobility and high photo leakage, and polycrystalline semiconductor films requiring complex processes and high costs.
Innovation Solution
A thin film transistor array panel is designed with a substrate, gate lines, polycrystalline semiconductors, data lines, and pixel electrodes, incorporating ohmic contacts and an assistant layer, where the semiconductors have different impurity concentrations and thicknesses to enhance mobility and stability, and a method involving crystallization of amorphous semiconductors to form polycrystalline semiconductors without additional masks or ion doping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If amorphous semiconductor thin film is used, then low temperature processing is enabled, but field effect mobility is low and photo leakage is high
Solution Approach 1:
The patent changes the physical state of the semiconductor material from amorphous to polycrystalline through controlled crystallization processes, thereby improving field effect mobility while maintaining compatibility with low-temperature substrate materials. The crystallization is achieved through specific thermal treatment regimes that transform the semiconductor structure without requiring high-temperature processing.
2Reliability
If polycrystalline semiconductor thin film is used, then field effect mobility and optical stability are improved, but manufacturing process becomes complex and cost increases
Solution Approach 1:
The patent combines the crystallization process with existing manufacturing steps by integrating it into the semiconductor formation sequence. The crystallization is performed in-situ during the fabrication process, eliminating the need for separate complex processing stages and reducing overall manufacturing complexity while achieving polycrystalline structure benefits.
Solution Approach 2:
The patent employs self-organized crystallization mechanisms where the semiconductor material automatically forms polycrystalline structures through controlled thermal treatment without requiring additional masking or ion doping steps. This self-service approach simplifies the manufacturing process by eliminating complex external interventions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves field effect mobility and optical stability while simplifying the manufacturing process, reducing costs by using a bottom gate structure and eliminating the need for additional masks or ion doping, resulting in a more efficient and cost-effective thin film transistor array panel.
Implementation Method 1
forming the polycrystalline semiconductor thin film requires a process of crystallizing a semiconductor on a substrate
Data Source
AI summary
The present invention provides a thin film transistor array panel which includes a substrate, gate lines formed on the substrate, polycrystalline semiconductors formed on the gate lines, data lines formed on the polycrystalline semiconductors and including first electrodes, second electrodes formed on the polycrystalline semiconductors and facing the first electrodes, and pixel electrodes connected to the second electrodes.