Polymer-Bonded Die Stacking for Robust Semiconductor Interconnects

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Solution Overview

Problem

Conventional semiconductor device stacking methods face challenges in achieving robust and scalable connections between dies due to insufficient mechanical coupling and inconsistencies in solder material planarization, leading to structural integrity issues and potential shorting or leakage.

Innovation Solution

A semiconductor device assembly is designed with a polymer layer deposited on one die, featuring openings that correspond to interconnects on another die, allowing for reliable bonding to a passivation layer and structural support, while avoiding inconsistencies in solder material protrusion and planarization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional stacking methods are used with solder material, then electrical coupling between dies is achieved, but mechanical coupling is insufficient and structural integrity is compromised

Engineering Contradiction:
Improvestructural integrityVSAvoidmechanical coupling
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent employs a composite bonding structure combining solder material for electrical coupling with a polymer material layer for mechanical support. This composite approach allows the solder to provide electrical connectivity while the polymer layer compensates for the mechanical weakness of solder, achieving both electrical and mechanical coupling requirements simultaneously.

Inventive Principle:
Principle #40Composite materials

2Reliability

If solder material is used for die coupling, then electrical connection is established, but inconsistencies in solder protrusion and planarization cause shorting or leakage

Engineering Contradiction:
Improveelectrical connection stabilityVSAvoidsolder planarization consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The polymer material layer acts as an intermediary between the solder material and the bonding interface. It provides a planar, consistent surface for bonding while allowing the underlying solder material to maintain its electrical connection function, thereby decoupling the electrical connection requirement from the planarization precision requirement.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the material parameter from purely solder-based bonding to a polymer-solder composite structure. This parameter change transforms the bonding interface properties, providing both electrical conductivity (through solder) and mechanical planarity (through polymer), thus resolving the precision-reliability contradiction.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If multiple dies are stacked to increase circuit density, then device capability is enhanced, but achieving robust connections between dies becomes more difficult

Engineering Contradiction:
Improvedevice capabilityVSAvoidconnection robustness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies composite material bonding (polymer plus solder) at each interface of the stacked die structure. This composite approach ensures that each bonding interface has both electrical connectivity and mechanical strength, making the overall multi-die stack more reliable and scalable as the number of dies increases.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures a structurally robust and scalable semiconductor device assembly by enabling reliable electrical and mechanical coupling between dies, preventing shorting and leakage, and enhancing the structural integrity of the stack.

Implementation Method 1

a layer of polymer material is deposited at a back side of a first semiconductor die

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS20240071976A1Semiconductor device with a polymer layer
Publication Date: 2024.02.29 MICRON TECHNOLOGY INC
  • US20240071976A1 patent drawing
  • US20240071976A1 patent drawing
  • US20240071976A1 patent drawing

AI summary

This document discloses techniques, apparatuses, and systems for a semiconductor device with a polymer layer. A semiconductor assembly is described that includes two semiconductor dies. The first semiconductor die has a first active side with first circuitry and a first back side opposite the first active side. Contact pads and a layer of polymer material are disposed at the first back side such that the layer of polymer material includes openings that expose the contact pads. The second semiconductor die has second circuitry disposed at a second active side. Interconnect structures are also disposed at the second active side such that the interconnect structures extend into the openings and couple to contact pads. A passivation layer (e.g., dielectric material) is disposed at the second active side and directly bonded to the layer of polymer material to reliably couple the two semiconductor dies.