Poly-Silicon Resistor Structure for Low-Power PMIC Start-Up
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Solution Overview
Problem
Traditional high voltage start-up circuits in power management integrated circuits (PMICs) and switch mode power supplies (SMPS) consume power continuously due to the use of power resistors, which prevents energy savings even when the start-up circuit is not operational.
Innovation Solution
A semiconductor structure combining an active device and a poly-silicon resistor, where the poly-silicon resistor is embedded in a field oxide layer and electrically connected to the active device, allowing for reduced volume and easy production without additional complex processes, enabling efficient voltage division and reduction circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a power resistor is used in a traditional high voltage start-up circuit, then the circuit can provide charging current to the capacitor, but power is continuously consumed even when the start-up circuit stops working
Solution Approach 1:
The patent applies the dynamics principle by making the resistance value variable rather than fixed. The poly-silicon resistor's resistance changes based on the voltage across it - at low voltages it has low resistance to enable charging current flow, and at high voltages it has high resistance to minimize power consumption. This dynamic adaptation resolves the contradiction between maintaining start-up functionality and reducing continuous power consumption.
Solution Approach 2:
The patent implements parameter changes by utilizing the voltage-dependent resistance characteristic of poly-silicon. The resistance parameter automatically transitions from a low-value state during start-up charging to a high-value state during normal operation. This parameter change enables the circuit to achieve both adequate charging current during boot-up and minimal standby power consumption during normal operation.
2Volume of stationary object
If a poly-silicon resistor is embedded in a field oxide layer, then volume reduction is achieved and production is simplified, but additional process complexity may be introduced
Solution Approach 1:
The patent applies the merging principle by integrating the poly-silicon resistor directly into the field oxide layer of the CMOS device structure. Instead of being a separate component, the resistor is formed within the existing oxide regions, combining multiple functions (isolation and resistance) into a single structural element. This integration reduces overall circuit volume and eliminates the need for separate resistor fabrication processes.
Solution Approach 2:
The patent implements multi-functionality by making the field oxide layer serve dual purposes: electrical isolation between devices and as the substrate for the poly-silicon resistor. The oxide layer that provides necessary electrical separation also hosts the resistive element, allowing one structural feature to fulfill multiple circuit functions and reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces power consumption by eliminating continuous power usage in the start-up circuit when not operational, achieving energy savings and improving conversion efficiency in high voltage applications.
Implementation Method 1
the poly-silicon resistor and the third doped area are electrically connected... This configuration reduces power consumption by allowing the start-up circuit to stop consuming power when inactive
Data Source
AI summary
A semiconductor structure comprising a substrate, an active device, a field oxide layer and a poly-silicon resistor is disclosed. The active device is formed in a surface area of the substrate. The active device has a first doped area, a second doped area and a third doped area. The second doped area is disposed on the first doped area. The first doped area is between the second and the third doped areas. The first doped area has a first type conductivity. The third doped area has a second type conductivity. The first and the second type conductivities are different. The field oxide layer is disposed on a part of the third doped area. The poly-silicon resistor is disposed on the field oxide layer and is electrically connected to the third doped area.