Polysilicon Stringer Removal via Segmented Etching
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Solution Overview
Problem
In semiconductor fabrication, maintaining electrical separation of wordlines in small geometries is challenging due to residual conducting material, known as stringers, which affect the distribution of threshold voltage (Vt), leading to unreliable memory cell operation and increased manufacturing costs.
Innovation Solution
A semiconductor stack comprising a storage layer, dielectric structures, conducting layers, and hard mask layers is patterned and etched to form wordlines, with a liner material overlay to disconnect polysilicon gates, achieving a narrow distribution of threshold voltage by removing stringers and preventing reentrant profiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reentrant profiles are used to eliminate stringers, then electrical separation of wordlines is improved, but threshold voltage distribution becomes too wide for reliable memory cell operation
Solution Approach 1:
The patent segments the polysilicon gate formation process into multiple etching steps: a first anisotropic etch to create initial wordline structures, followed by a second isotropic etch to remove stringers. This segmentation allows each step to be optimized independently - the first step creates the basic structure with proper geometry, while the second step selectively removes residual conducting material without affecting the gate profile, thus resolving the contradiction between electrical separation and threshold voltage distribution.
Solution Approach 2:
The patent applies preliminary protective actions by forming a mandrel structure and using it to define the wordline geometry before etching. The mandrel serves as a template that ensures vertical or tapered profiles are maintained during the etching process. This preliminary structuring prevents the formation of reentrant profiles while still enabling effective stringer removal in subsequent steps, thereby maintaining narrow threshold voltage distribution while achieving electrical separation.
2Manufacturing precision
If vertical or tapered profiles are used instead of reentrant profiles, then threshold voltage distribution is improved, but polysilicon stringers are not removed resulting in random single-bit failures
Solution Approach 1:
The patent introduces an intermediary substance - a sacrificial mandrel material - that facilitates the etching process. The mandrel is formed with precise geometry, then used as a template to create wordlines with vertical or tapered profiles. After the wordlines are formed, the mandrel is removed, and the previously problematic stringers are eliminated through the second isotropic etch step. This intermediary structure enables the use of benign profiles while still achieving complete stringer removal, thus resolving the contradiction between threshold voltage distribution and electrical separation.
Solution Approach 2:
The patent changes the etching parameters between steps: the first etch uses anisotropic conditions to create well-defined vertical walls, while the second etch uses isotropic conditions with different chemistry to selectively remove stringers. By changing etch selectivity, directionality, and chemistry between steps, the process achieves both narrow threshold voltage distribution (through controlled profiles) and complete stringer removal (through selective isotropic etching), resolving the apparent contradiction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively disconnects polysilicon stringers, ensuring electrical isolation of wordlines and a narrow Vt distribution, enhancing memory cell reliability and manufacturing efficiency.
Implementation Method 1
Methods of fabricating wordlines in semiconductor memories and semiconductor devices. The stack may be patterned to facilitate etching to form wordlines... a third etch may remove conducting material, thereby creating wordlines disconnected or independent from each other
Data Source
AI summary
A method of fabricating wordlines in semiconductor memory structures is disclosed that eliminates stringers between wordlines while maintaining a stable distribution of threshold voltage. A liner is deposited before performing a wordline etch, and a partial wordline etch is then performed. Remaining portions of the liner are removed, and the wordline etch is completed to form gates having vertical or tapered profiles.