Package-on-Package Alignment Notch for Warpage Compensation

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Solution Overview

Problem

Conventional Package-on-Package (PoP) techniques face alignment challenges due to warpage issues, where alignment pillars are buried in the molding compound, making accurate alignment of solder balls difficult.

Innovation Solution

The implementation of an alignment notch on the insulating encapsulation, which allows for alignment even under significant warpage, by being disposed on a corner or along a scribe line of the package, enabling precise alignment of subsequent packages without being buried by the encapsulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If alignment pillars are formed in the molding compound for alignment, then alignment of solder balls can be performed, but the alignment pillars become buried in the molding compound due to warpage

Engineering Contradiction:
Improvealignment precisionVSAvoidalignment pillar accessibility
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The alignment reference feature (notch) is extracted from the bulk molding compound and positioned on the top surface, making it accessible for alignment purposes without being buried by warpage. This separates the alignment function from the encapsulation material itself.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The alignment reference is moved from a vertical/embedded dimension (pillars within the compound) to a horizontal/surface dimension (notch on the top surface), allowing alignment to occur in a different spatial plane that is less affected by warpage.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conventional alignment pillars are used, then alignment can be performed initially, but warpage buries the pillars making subsequent alignment impossible

Engineering Contradiction:
Improvealignment processVSAvoidwarpage tolerance
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The alignment notch is formed on the top surface of the molding compound before the final encapsulation completes, ensuring the alignment reference is established in a position that will remain accessible even after warpage occurs during subsequent processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The warpage that would normally bury alignment pillars is converted into a non-problematic condition by using a surface notch that either accommodates the warpage or becomes more prominent, turning the harmful warpage effect into a neutral or even beneficial alignment feature.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If solder balls need to be accurately aligned through reflow bonding, then reliable electrical connection is achieved, but the alignment process is highly sensitive to warpage

Engineering Contradiction:
Improvebonding reliabilityVSAvoidsolder ball alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The alignment notch serves as an intermediary reference feature that mediates between the warpage-prone molding compound and the precision-required solder ball placement, providing a stable reference that is less affected by warpage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11201142B2Semiconductor package, package on package structure and method of froming package on package structure
Publication Date: 2021.12.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11201142B2 patent drawing
  • US11201142B2 patent drawing
  • US11201142B2 patent drawing

AI summary

A semiconductor package includes a die, an insulation layer, a plurality of first electrical conductive vias, a plurality of second electrical conductive vias, a plurality of thermal conductive vias and a connecting pattern. The die includes a plurality of first pads and a plurality of second pads. The insulation layer is disposed on the die and includes a plurality of openings exposing the first pads and the second pads. The first electrical conductive vias and the second electrical conductive vias are disposed in the openings and contact the first pads and the second pads respectively. The thermal conductive vias are disposed on the insulation layer. The connecting pattern is disposed on the insulation layer and connects the first electrical conductive vias and the thermal conductive vias. The thermal conductive vias are connected to the first pads through the connecting pattern and the first electrical conductive vias.