Porting Circuit Design Across Semiconductor Processes
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Solution Overview
Problem
Integrated circuit designers face challenges in reusing circuit designs across different semiconductor manufacturing processes, particularly in reducing static power consumption due to off-state leakage current, while maintaining or improving electrical performance and reducing intra- and inter-die variability in threshold voltage.
Innovation Solution
The method involves transforming transistor parameter targets from a first semiconductor process to a second process, utilizing the Deeply Depleted Channel (DDC) transistor architecture and manufacturing process, which provides lower subthreshold leakage currents and reduced variability, allowing for porting of existing circuit designs with minimal changes to physical layouts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If circuit designs are ported from a first semiconductor process to a second process, then leakage current and variability are reduced, but manufacturing complexity increases
Solution Approach 1:
The patent applies parameter changes by transforming transistor parameter targets from the first semiconductor process to the second process. This involves adjusting threshold voltage, channel width, channel length, and other electrical parameters to match the characteristics of the target process while maintaining circuit functionality. The method systematically modifies these parameters to achieve lower leakage current and reduced variability in the second process.
Solution Approach 2:
The patent uses copying by creating a ported circuit design that replicates the original circuit's functionality in the second semiconductor process. The method copies the circuit topology and layout from the first process while adapting the transistor parameters to match the second process characteristics, enabling reuse of existing designs without complete redesign.
2Reliability
If circuit designs are ported from a first semiconductor process to a second process, then leakage current and variability are reduced, but redesign effort increases
Solution Approach 1:
The patent applies copying by creating a ported circuit design that replicates the original circuit's functionality in the second semiconductor process. The method copies the circuit topology and layout from the first process while adapting the transistor parameters to match the second process characteristics, enabling reuse of existing designs without complete redesign.
Solution Approach 2:
The patent applies parameter changes by transforming transistor parameter targets from the first semiconductor process to the second process. This involves adjusting threshold voltage, channel width, channel length, and other electrical parameters to match the characteristics of the target process while maintaining circuit functionality. The method systematically modifies these parameters to achieve lower leakage current and reduced variability in the second process.
3Manufacturing precision
If transistor parameters are transformed between processes, then electrical performance improves, but process adaptability decreases
Solution Approach 1:
The patent applies parameter changes by transforming transistor parameter targets from the first semiconductor process to the second process. This involves adjusting threshold voltage, channel width, channel length, and other electrical parameters to match the characteristics of the target process while maintaining circuit functionality. The method systematically modifies these parameters to achieve lower leakage current and reduced variability in the second process.
Solution Approach 2:
The patent applies dynamics by creating a flexible parameter transformation approach that can adapt to different semiconductor processes. The method dynamically adjusts transistor parameters based on the specific characteristics of the target process, enabling the same circuit design to be optimized for different manufacturing processes with varying electrical characteristics.
Data Source
AI summary
Porting a first integrated circuit design targeted for implementation in a first semiconductor manufacturing process, and implementing a second circuit design in a second semiconductor manufacturing process wherein the electrical performance of the second integrated circuit meets or exceeds the requirements of the first integrated circuit design even if the threshold voltage targets of the second integrated circuit design are different from those of the first integrated circuit design; and wherein physical layouts, and in particular the gate-widths and gate-lengths of the transistors, of the first and second integrated circuit designs are the same or substantially the same. The second integrated circuit design, when fabricated in the second semiconductor manufacturing process and then operated, experiences less off-state transistor leakage current than does the first integrated circuit design, when fabricated in the first semiconductor manufacturing process, and then operated. Porting includes determining processing targets for the second semiconductor manufacturing process.