Post-CTS Clock Tree Restructuring for User-Specified Instances
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Solution Overview
Problem
Conventional EDA software systems lack the ability to efficiently and automatically integrate user-specified clock instances into a post-CTS clock tree, requiring manual modifications or re-running clock tree synthesis, which is time-consuming and can lead to suboptimal restructuring.
Innovation Solution
An EDA software system implements a process flow and API that allows users to automatically restructure a post-CTS clock tree by selecting an optimal clock net for connecting a user-specified clock instance, considering factors like logical equivalence and conductive trace length, thereby reducing manual intervention and synthesis time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If manual modifications or re-running clock tree synthesis are used to integrate user-specified clock instances, then the clock tree can be modified, but the process is time-consuming and requires significant manual intervention
Solution Approach 1:
The system automatically detects candidate clock nets, evaluates them using objective functions, and selects optimal connections without requiring manual intervention. The algorithm self-manages the entire process of integrating user-specified clock instances into the post-CTS clock tree, eliminating the need for manual modifications or re-running full clock tree synthesis.
2Manufacturing precision
If full clock tree synthesis is re-run to add user-specified clock instances, then all clock sinks can be re-optimized, but the process is computationally expensive and time-consuming
Solution Approach 1:
The system segments the clock tree modification process by focusing only on integrating the specific user-specified clock instance into the existing post-CTS clock tree structure. Instead of re-optimizing the entire clock tree, the algorithm identifies and connects to relevant candidate clock nets, maintaining optimization quality while dramatically reducing computational effort and time.
3Adaptability or versatility
If user-specified clock instances are added to post-CTS clock tree, then design flexibility is improved, but maintaining design rules and constraints becomes more complex
Solution Approach 1:
The system uses feedback mechanisms by evaluating candidate clock nets against objective functions that encode design rules and constraints. The algorithm receives feedback from the objective function evaluation and adjusts its selection to ensure design compliance, automatically maintaining all required design rules while adding user-specified clock instances.
Data Source
AI summary
A clock tree generated through clock tree synthesis (CTS) for an integrated circuit (IC) design is stored in memory. The IC design includes a post post-CTS clock tree that includes a plurality of clock nets. A request to add a user-specified clock instance to the post-CTS clock tree is received and all logically equivalent clock nets in the post-CTS clock tree detected to generate a set of candidate clock nets. A reduced set of candidate clock nets is generated from the set of candidate clock nets based on a distance between each candidate clock net and the clock instance. One candidate clock net in the reduced set is selected based on a length of conductive traces required to interconnect the corresponding candidate clock net and the clock instance. The post-CTS clock tree is restructured to connect the clock instance to the selected one of the candidate clock nets.