Post Package Repair Management for Memory Arrays
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Solution Overview
Problem
Existing semiconductor memory technologies lack effective solutions for managing transient and non-transient memory failures, particularly in terms of post-package repair (PPR) mechanisms that can survive various system resets and power cycles.
Innovation Solution
The implementation of post-package repair (PPR) management systems that include soft PPR (sPPR) and hard PPR (hPPR) capabilities, allowing memory devices to detect errors, remap faulty rows, and notify hosts for maintenance, with sPPR providing temporary remapping and hPPR offering permanent remapping that survives power cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If post package repair (PPR) mechanisms are implemented to handle memory failures, then system reliability is improved, but device complexity increases
Solution Approach 1:
The PPR mechanism is divided into two distinct modes: soft PPR (sPPR) for transient errors and hard PPR (hPPR) for permanent failures. This segmentation allows the system to apply different repair strategies based on the nature of the failure, improving reliability while managing complexity through specialized sub-systems rather than a monolithic complex structure.
Solution Approach 2:
The system dynamically selects between sPPR and hPPR modes based on the detected error type. The controller transitions between different operational states (temporary remapping vs. permanent remapping) depending on whether transient or permanent failures are detected, allowing the system to adapt its complexity level to the actual failure conditions.
2Ease of operation
If soft PPR (sPPR) is used for temporary remapping, then ease of operation is improved, but reliability deteriorates under power cycles
Solution Approach 1:
The system provides dynamic remapping capability where the remapping configuration can be changed or cleared based on operational needs. The sPPR mode allows temporary remapping that can be dynamically adjusted or reset, providing ease of operation while the system automatically transitions to hPPR for persistent reliability across power cycles.
Solution Approach 2:
The system performs preliminary error detection and classification before executing the appropriate repair mode. By detecting transient errors early and applying sPPR temporarily, the system maintains ease of operation for recoverable errors while having hPPR ready as a preliminary prepared solution for persistent failures that require surviving power cycles.
3Reliability
If hard PPR (hPPR) is implemented for permanent remapping, then reliability is improved, but loss of time occurs during remapping execution
Solution Approach 1:
The system applies partial remapping action by first attempting sPPR for transient errors, which resolves many issues without the full time cost of hPPR. Only when permanent failures are detected does the system execute the more time-consuming hPPR process, thus applying the excessive time investment only when absolutely necessary for reliability.
Solution Approach 2:
The system dynamically determines the appropriate remapping duration and scope based on error classification. For transient errors, temporary remapping is applied quickly; for permanent failures, permanent remapping is executed with full time investment. This dynamic approach minimizes overall time loss while maintaining reliability through appropriate action selection.
4Manufacturing precision
If comprehensive error detection and remapping capabilities are added, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The error detection and remapping system is segmented into specialized components: error detection circuitry, controller logic for mode selection, and separate execution paths for sPPR and hPPR. This segmentation allows comprehensive error handling capability while organizing the complexity into manageable, functionally distinct modules that can be manufactured with precision.
Data Source
AI summary
A soft post package repair (sPPR) request is detected. Data stored in a target row of a memory array associated with the sPPR request is written to a buffer. Execution of non-maintenance requests on the target row is suspended. Responsive to suspension of execution of non-maintenance requests on the target row, the sPPR request is executed on the target row. Subsequent to completion of the sPPR request, execution of non-maintenance requests on the target row is resumed and the data stored in the buffer is written to the repaired target row.