Power Amplifier Biasing Scheme for High Saturation Power
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Solution Overview
Problem
Current power amplifiers struggle to reliably achieve high saturation power levels required for RFICs operating in new frequency bands, such as the 13GHz band, due to limitations in existing biasing schemes and transistor designs.
Innovation Solution
A circuit structure incorporating a power amplifier with a biasing scheme that utilizes multiple voltage generators to provide a positive power supply voltage, negative bias voltage, and positive bias voltages to parallel transistor chains connected through input and output transformers. This configuration allows for negative back biasing of third NFETs, raising their threshold voltages and enabling higher power output without violating reliability specifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional biasing schemes are used in power amplifiers, then the device complexity is low, but the saturation power level cannot achieve the required high power operation (28dBm for 13GHz band)
Solution Approach 1:
The power amplifier is divided into multiple parallel transistor chains, where each chain contains series-connected NFETs with independent bias control. This segmentation allows each transistor to be optimized for specific voltage ranges, enabling the overall system to achieve high saturation power (28dBm) while maintaining reliable operation through distributed bias management rather than a single complex biasing circuit.
Solution Approach 2:
The invention applies different bias voltages to the front gate and back gate of each NFET, dynamically changing the operating parameters of the transistors. By adjusting the back gate voltage (Vbg) and front gate voltage (Vfg) independently, the threshold voltage and operating point of each transistor can be optimized to achieve high power output while staying within reliability specifications for gate-to-drain voltage.
2Power
If higher power supply voltage is applied to increase saturation power, then the power output increases, but the gate-to-drain voltage exceeds reliability specifications
Solution Approach 1:
The invention changes the operating parameters by applying a back gate voltage (Vbg) to each NFET in addition to the front gate voltage (Vfg). This back biasing modifies the threshold voltage and internal electric fields of the transistors, allowing the device to sustain higher power supply voltages and achieve greater power output while keeping the gate-to-drain voltage within reliable operating limits specified by the transistor manufacturer.
3Power
If parallel transistor chains with multiple NFETs are used to achieve high power, then the saturation power increases, but the device complexity and biasing requirements increase
Solution Approach 1:
The power amplifier employs multiple parallel transistor chains with series-connected NFETs, segmenting the high power requirement into manageable transistor-level operations. Each chain processes a portion of the total power, and the segmented architecture allows independent optimization and biasing of each transistor, achieving high saturation power while maintaining controllable complexity through modular design.
Solution Approach 2:
The back gate of each NFET serves multiple functions: it controls the threshold voltage, adjusts the operating point, and enables the transistor to operate reliably at higher power supply voltages. This multi-functionality of the back gate reduces the need for additional specialized components, managing device complexity while achieving high power output.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables power amplifiers to achieve high saturation power levels, such as approximately 28dBm, necessary for next-generation RFICs operating in new frequency bands, while maintaining reliability and efficiency.
Implementation Method 1
negative back biasing of third NFETs, raising their threshold voltages and enabling higher power output without violating reliability specifications
Data Source
Figure 1A
Figure 1B
Figure 2
AI summary
A disclosed structure includes a power amplifier and circuitry for implementing a biasing scheme that enables high power operation. The power amplifier includes parallel transistor chains connected to input and output transformers. Each chain includes series-connected first, second, and third n-type field effect transistors (NFETs) having front and back gates. The output transformer receives a variable positive power supply voltage generated using average power tracking. Front and back gates of each third NFET receive a positive bias voltage greater than or equal to the variable positive power supply voltage and a negative bias voltage, respectively. By negative back biasing the third NFETs, threshold voltages thereof are raised so a high positive bias voltage can be applied to the front gates to increase power output without violating reliability specifications. Optionally, by making the negative bias voltage temperature dependent, voltages at source regions of the third NFETs are held constant.