Multi-Branch Power Amplifier Biasing for Wideband Back-Off Efficiency
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Solution Overview
Problem
Existing N-way Doherty power amplifier circuits have limited operating bandwidth due to a relatively large load pull ratio of power transistors, making them unsuitable for high-power ultra-wideband applications.
Innovation Solution
A power amplifier circuit design featuring N input ports, N power amplifier branches, and a combiner circuit, where the first power amplifier branch operates in class AB or class B mode, and N−1 second power amplifier branches operate in class C mode with decreasing gate bias voltages, eliminating load pull between branches and achieving a load pull ratio of 1.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If N-way Doherty power amplifier circuit is used to improve back-off efficiency, then power amplification efficiency is improved, but operating bandwidth is limited due to large load pull ratio
Solution Approach 1:
The power amplifier is divided into N independent power amplifier branches, each operating in class C mode with different gate bias voltages. This segmentation allows each branch to operate at its optimal efficiency point while collectively covering a wide bandwidth range, resolving the contradiction between high efficiency and wide bandwidth.
Solution Approach 2:
Different gate bias voltages are applied to each power amplifier branch to optimize their operating points. By varying the bias voltage parameters across branches, the system achieves high efficiency at multiple power back-off levels while maintaining wideband operation capability.
2Productivity
If class C operating mode is used for power amplifier branches to improve efficiency, then back-off efficiency is improved, but load pull ratio increases limiting bandwidth
Solution Approach 1:
The system segments the power amplification function across N branches, each in class C mode but with different bias voltages. This segmentation distributes the efficiency improvements across multiple components, allowing the overall system to achieve wide bandwidth while maintaining high back-off efficiency through coordinated operation of all branches.
Solution Approach 2:
The gate bias voltages of the N-1 second power amplifier branches are dynamically optimized to become lower in order, enabling each branch to contribute to efficiency at different power levels. This dynamic parameter adjustment allows the system to maintain high efficiency across varying operating conditions while preserving bandwidth.
Data Source
AI summary
A power amplifier circuit, a transmitter, and a network device are provided. The power amplifier circuit includes N input ports, N power amplifier branches, one combiner circuit, and one output port. Each of the N input ports is connected to one power amplifier branch, each of the power amplifier branches is connected to the combiner circuit, and the combiner circuit is further connected to the output port; the N power amplifier branches and the combiner circuit are configured to perform power amplification and combining on N input signals, to generate an output signal. The N power amplifier branches include one first power amplifier branch operates in a class AB or class B operating mode, and N−1 second power amplifier branches operate in a class C operating mode with different gate bias voltages, the gate bias voltages of the N−1 second power amplifier branches become lower in order.