Power Electronics Carrier With CTE-Matched Isolation Layer
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Solution Overview
Problem
The high cost associated with multi-layer power electronic substrates used in integrated power modules is prohibitive, particularly for low-cost and high-volume applications, necessitating a high-performance power electronics substrate at a lower cost.
Innovation Solution
A power electronics carrier is developed using a non-corrosive metal substrate, such as steel, with a region of electrical isolation material that matches the coefficient of thermal expansion (CTE) of the metal substrate, and includes a structured metallization layer for semiconductor die mounting, utilizing materials like glass and copper for electrical isolation and conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multi-layer power electronic substrates (DBC, IMS, AMB) are used, then performance and reliability are improved, but manufacturing cost increases significantly
Solution Approach 1:
The patent replaces expensive multi-layer substrates with a simple, cost-effective alternative: a metal substrate (such as aluminum or copper) with a deposited insulating layer and conductive pattern. This simplified structure achieves the necessary electrical isolation and thermal conduction functions without the complexity and high cost of DBC, IMS, or AMB multi-layer constructions, making it suitable for low-cost, high-volume applications.
Solution Approach 2:
The patent extracts and eliminates the complex multi-layer structure from traditional substrates, retaining only the essential functions: thermal conduction through the metal substrate and electrical isolation through the deposited insulating layer. This extraction of unnecessary complexity reduces manufacturing cost while maintaining core performance requirements for power electronic applications.
2Reliability
If complex processing steps (oxidation, etching, deposition) are used to form multi-layer substrates, then substrate performance is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent changes the manufacturing parameters from complex multi-step processes (oxidation, etching, deposition) to simpler processes. The insulating layer is formed through direct deposition or screen printing of ceramic paste, and conductive layers are applied through screen printing or lamination, eliminating the need for complex oxidation and etching steps while maintaining functional performance.
Solution Approach 2:
The patent segments the substrate fabrication into distinct, independently optimizable layers: a metal substrate base layer, an insulating layer (deposited or printed), and conductive pattern layers. This segmentation allows each layer to be applied using the most appropriate simple technique for that function, avoiding the need for integrated complex processing steps.
3Reliability
If expensive raw materials (copper, aluminum, ceramic) are used for multi-layer substrates, then electrical and thermal performance is improved, but cost increases
Solution Approach 1:
The patent uses composite material structures where a metal substrate (aluminum or copper) provides thermal conduction, an insulating layer (ceramic or polymer) provides electrical isolation, and conductive patterns provide electrical connectivity. This composite approach achieves the necessary electrical and thermal performance using cost-effective material combinations rather than expensive homogeneous multi-layer ceramic or metal substrates.
Solution Approach 2:
The patent replaces expensive raw materials with cheaper alternatives that perform the same functions: using deposited ceramic or polymer insulating layers instead of expensive multi-layer ceramic, and using screen-printed conductive pastes instead of precision-deposited metal films. These cost-effective materials maintain the required electrical and thermal performance for power electronic applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a cost-effective power electronics substrate that withstands thermal cycles and maintains electrical isolation, enabling reliable operation of semiconductor dies with reduced material costs.
Implementation Method 1
a coefficient of thermal expansion of the region of electrical isolation material substantially matches a coefficient of thermal expansion of metal from the metal substrate at the direct interface
Implementation Method 2
maintaining high performance by using inexpensive materials and simplifying processing, enabling reliable operation under temperature cycles and supporting multiple semiconductor dies with adequate thermal conductivity
Data Source
AI summary
A power electronics device comprises a power electronics carrier includes a non-corrosive metal substrate and a region of electrical isolation material that forms a direct interface with the metal substrate, and a first semiconductor die mounted on the region of electrical isolation material, and a coefficient of thermal expansion of the region of electrical isolation material substantially matches a coefficient of thermal expansion of metal from the metal substrate at the direct interface.