Semiconductor Power Transmission Cells With Insulating Strip Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of gate-all-around (GAA) transistor features around silicon nanowires in semiconductor manufacturing is challenging, requiring advancements to improve gate control and reduce short-channel effects while maintaining manufacturing efficiency and cost-effectiveness.
Innovation Solution
A semiconductor structure with a backside power rail architecture is introduced, featuring power transmission cell regions with insulating strips replacing dummy gate structures to reduce leakage and enhance manufacturing yield, and the use of insulating strips between power transmission cell regions to prevent electrical leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy gate structures are used in power transmission cell regions, then manufacturing process is simpler, but electrical leakage occurs between regions
Solution Approach 1:
The patent removes the dummy gate structure from the power transmission cell region and replaces it with an insulating strip. This extraction eliminates the harmful electrical leakage path while maintaining the necessary electrical isolation function, directly resolving the contradiction between reliability and structural simplicity.
Solution Approach 2:
The insulating strip acts as an intermediary element that provides electrical isolation between power transmission cell regions. Unlike the dummy gate structure which conducted leakage current, the insulating strip mediates the isolation requirement without introducing harmful electrical paths, thereby improving reliability without significant complexity increase.
2Reliability
If conventional metal routing is used in backend-of-line, then manufacturing process is established, but overall resistance is high
Solution Approach 1:
The patent segments the power transmission path by introducing dedicated power transmission cell regions with vertical via rails and contact rails. This segmentation allows for lower resistance pathways through the backend-of-line, improving power transmission efficiency while distributing the complexity across modular, repeatable structures that can be manufactured using established processes.
Solution Approach 2:
The patent transitions from planar metal routing to a three-dimensional power transmission architecture using vertical via rails and contact rails that extend through multiple layers. This dimensional change enables lower resistance paths by utilizing the vertical dimension for power distribution, improving reliability while maintaining compatibility with conventional multi-layer manufacturing processes.
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a functional cell region including an n-type functional transistor and a p-type functional transistor. The semiconductor structure also includes a first power transmission cell region including a first cutting feature and a first contact rail in the first cutting feature. The semiconductor structure also includes a first power rail electrically connected to a source terminal of the p-type functional transistor and the first contact rail of the first power transmission cell region. The semiconductor structure also includes a second power transmission cell region adjacent to the first power transmission cell and including a second cutting feature and second contact rail in the second cutting feature. The semiconductor structure also includes an insulating strip extending from the first cutting feature to the second cutting feature in a first direction.