Power Combining Power Supply System for Low Ripple Digital Circuits
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Solution Overview
Problem
Conventional power supply systems face challenges in delivering high frequency components with high efficiency and low voltage ripple, while also minimizing the number of components and avoiding the use of costly and potentially hazardous low-ESR capacitors, which are necessary in switching power supplies to reduce ripple voltage.
Innovation Solution
A power supply system comprising a low-speed and a high-speed power supply, with a frequency blocking power combiner circuit and feedback loop that combines their outputs to generate a high-bandwidth, low-ripple output, reducing the need for low-ESR capacitors and minimizing the number of inductors, and allowing for integration of the high-speed power supply into digital circuits for precise voltage control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a switched-mode power supply (SMPS) is used to achieve high efficiency, then power conversion efficiency is improved, but the ability to deliver high frequency components is worsened due to low switching frequencies
Solution Approach 1:
The power supply system is segmented into two independent power supply circuits: a first power supply circuit optimized for high efficiency (SMPS topology) and a second power supply circuit optimized for high frequency response (linear regulator topology). Each circuit operates in its optimal frequency range and independently supplies power to the load, avoiding the trade-off between efficiency and frequency response that plagues single-circuit designs.
2Speed
If a linear regulator is used to deliver high frequency components, then frequency response is improved, but power conversion efficiency is worsened
Solution Approach 1:
The system segments the power supply function into two specialized circuits: the first power supply circuit (SMPS) handles high power delivery with high efficiency, while the second power supply circuit (linear regulator) handles high frequency components with excellent frequency response. This segmentation allows each circuit to operate in its optimal performance regime without compromising the other.
3Object-generated harmful factors
If low-ESR capacitors are used to reduce voltage ripple, then voltage ripple is reduced, but cost and fire hazard are worsened
Solution Approach 1:
The invention extracts the voltage ripple reduction function from the capacitor and transfers it to the second power supply circuit (linear regulator). By having the linear regulator actively regulate the output voltage and suppress ripple, the system can use standard, safe capacitors instead of expensive, flammable low-ESR capacitors, while achieving the same or better ripple performance.
4Object-generated harmful factors
If multiple inductors are used in high-current switching regulator circuits to reduce output ripple, then output ripple is reduced, but device complexity and cost are worsened
Solution Approach 1:
The invention extracts the output ripple reduction function from the inductor-based filtering approach and transfers it to the second power supply circuit (linear regulator). This eliminates the need for multiple inductors and their associated complexity, while achieving superior ripple performance through active regulation.
5Device complexity
If conventional power supplies are used to supply digital circuits, then simplicity is maintained, but voltage adjustment speed is worsened preventing peak efficiency operation
Solution Approach 1:
The second power supply circuit (linear regulator) is designed with high bandwidth and fast response characteristics, enabling it to dynamically adjust the output voltage in real-time according to the instantaneous power requirements of the digital circuit. This dynamic response allows the power supply to track and respond to rapid changes in processor workload, ensuring the circuit operates at peak efficiency without the delays inherent in conventional power supplies.
Data Source
AI summary
A power supply system comprises a low-speed power supply and a high-speed power supply configured to operate in first and second frequency ranges, respectively, and generate first and second outputs, respectively. The lower end of the second frequency range is at least higher than a lower end of the first frequency range. A frequency blocking power combiner circuit combines the power from the first output with the power from the second output to generate a combined, third output for driving a load, while providing frequency-selective isolation between the first and second outputs. A feedback circuit is coupled to receive the combined, third output through a global feedback loop. The feedback circuit generates first and second power supply control signals for controlling the low-speed power supply and the high-speed power supply, respectively, based on a difference between the third output and the predetermined control signal.