Power Converter Inductance Reduction via Vertical Capacitor Nesting
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Solution Overview
Problem
Conventional power converters face issues with high inductance between components, which can lead to voltage spikes and electromagnetic interference, affecting the efficiency and lifespan of switching devices.
Innovation Solution
The power converter design incorporates a capacitor bank mounted over high power switching modules and a gate driver module with planar transformers, reducing the distance between the capacitor bank and the gate driver to minimize inductance and improve the connection between electrical conductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional power converter components are arranged with standard spacing, then ease of manufacture and assembly is improved, but inductance between components increases causing voltage spikes and electromagnetic interference
Solution Approach 1:
The capacitor bank is positioned vertically over the high power switching modules in the Z-dimension, creating a three-dimensional arrangement that reduces inductance by minimizing the current loop area between the capacitor terminals and switching devices, rather than placing components side-by-side in the same plane
Solution Approach 2:
The capacitor bank is mounted directly over the high power switching modules, nesting the capacitor assembly within the vertical space above the switching modules. This nested arrangement reduces the distance between components and minimizes parasitic inductance while maintaining a compact overall structure
2Object-affected harmful factors
If the distance between capacitor bank and gate driver is reduced, then inductance is minimized reducing voltage spikes, but manufacturing and assembly precision requirements increase
Solution Approach 1:
The capacitor bank and gate driver module are integrated into a single assembled unit where the capacitor bank is mounted directly over the high power switching modules, and the gate driver is positioned adjacent to the capacitor bank. This merged arrangement minimizes the distance between the capacitor terminals and gate driver, reducing parasitic inductance and voltage spikes while maintaining manufacturability through modular assembly
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces inductance, minimizing voltage spikes and electromagnetic interference, thereby enhancing the efficiency and extending the lifespan of switching devices while allowing for higher switching frequencies and cleaner output waveforms.
Implementation Method 1
a capacitor bank that provides a conditioned voltage to the high power switching modules for producing the AC output in response to receiving and storing electrical energy related to a direct current (DC) supply
Implementation Method 2
a gate driver module at a top region of the high power switching modules, the gate driver module including a plurality of planar transformers for reducing a distance between the capacitor bank and the gate driver
Data Source
AI summary
A power inverter comprises a plurality of high power switching modules that form an alternating current (AC) output; a plurality of terminals in communication with the high power switching modules for outputting the AC output; a capacitor bank that provides a conditioned voltage to the high power switching modules for producing the AC output in response to receiving and storing electrical energy related to a direct current (DC) supply; and a case positioned over the high power switching modules. The capacitor bank is mounted to the case, and the capacitor bank is positioned over the high power switching modules so that the high power switching terminals are proximal the capacitor bank for reducing inductance. A gate driver module at a top region of the high power switching modules includes a plurality of planar transformers for reducing a distance between the capacitor bank and the gate driver.