Power Converter Terminal Overlap for Surge Voltage Cancellation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In power converters, the use of 1-in-1 semiconductor devices leads to significant surge issues due to higher input and output terminals, which are exacerbated by high-frequency switching, and existing solutions fail to effectively prevent these surges when combined with N-in-1 semiconductor devices.
Innovation Solution
The power converter design incorporates 1-in-1 and N-in-1 semiconductor devices with strategically positioned high and low potential side terminals, where the high potential side terminal of one device overlaps with the low potential side terminal of another, allowing opposite-direction currents to flow in parallel wirings, canceling magnetic fields and preventing mutual inductance and surge voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If 1-in-1 semiconductor devices are used, then the number of semiconductor devices can be reduced, but surge voltages increase due to higher input and output terminals
Solution Approach 1:
The patent combines 1-in-1 semiconductor devices with N-in-1 semiconductor devices in a hybrid stacked configuration. This merging approach allows the system to benefit from the reduced device count of 1-in-1 devices while mitigating their surge voltage issues through the stabilizing influence of N-in-1 devices with fewer terminals.
Solution Approach 2:
The patent applies different semiconductor device types (1-in-1 and N-in-1) to different locations in the stacked configuration. Specifically, 1-in-1 devices are used in certain positions while N-in-1 devices are used in other positions, allowing each type to be placed where its characteristics are most beneficial while compensating for its drawbacks through the complementary device type.
2Productivity
If high-frequency switching is implemented, then power conversion efficiency is improved, but surge issues are exacerbated
Solution Approach 1:
The patent changes the terminal configuration parameter by using a hybrid of 1-in-1 and N-in-1 semiconductor devices with different terminal counts. This parameter change allows high-frequency switching to be implemented for improved efficiency while the varied terminal configurations across different device positions help distribute and reduce surge effects.
3Ease of manufacture
If only the same type of semiconductor devices are stacked, then manufacturing is simplified, but adaptability to different circuit configurations is reduced
Solution Approach 1:
The patent creates a universal stacked configuration that can accommodate multiple types of semiconductor devices (1-in-1 and N-in-1) in different positions. This multi-functional stacking approach allows the same physical structure to be adapted for different circuit configurations, such as converters, inverters, or hybrid systems, while maintaining relatively simple manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces surge voltages in the semiconductor devices by canceling magnetic fields generated during switching, optimizing the structure and characteristics of the power converter.
Implementation Method 1
the high potential side terminal of one device overlaps with the low potential side terminal of another, allowing opposite-direction currents to flow in parallel wirings, canceling magnetic fields and preventing mutual inductance and surge voltages
Data Source
AI summary
In a power converter, a plurality of semiconductor devices and a plurality of cooling plates are stacked. The plurality of semiconductor devices includes a first-first sealed semiconductor device, a second-first sealed semiconductor device, and a plurality of second sealed semiconductor devices. The first-first sealed semiconductor device has a first high potential side terminal, and a first low potential side terminal. The second-first sealed semiconductor device has a second high potential side terminal, and a second low potential side terminal. When viewed along a stacking direction, the first high potential side terminal is disposed to overlap with the second low potential side terminal.