Power Gating Circuit With Sleep-Signal Acknowledge Feedback
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Solution Overview
Problem
Power-gating methods, such as the daisy chain method, face challenges in generating a final acknowledgement signal efficiently, leading to high leakage consumption due to the large number of buffers required.
Innovation Solution
A power gating circuit design that includes a first and second chain buffer to generate sleep signals, which are used to control switch blocks, allowing for a reduced number of buffers and improved power management by returning a second sleep signal as an acknowledge signal to the power management unit, indicating completion of power gating.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the daisy chain method is used to generate control signals for power gating, then the final acknowledgement signal can be generated, but leakage consumption increases due to the large number of buffers required
Solution Approach 1:
The power gating circuit is divided into multiple independent switch blocks (first switch block, second switch block, etc.), each with its own chain buffer. This segmentation allows the acknowledge signal to be generated from any switch block that completes power gating first, eliminating the need for buffers in all switch blocks and reducing overall leakage consumption.
Solution Approach 2:
Instead of requiring all switch blocks to signal completion sequentially, the invention inverts the logic by accepting the first acknowledge signal received from any switch block. This inversion changes the control flow from a sequential dependency chain to a parallel completion detection mechanism, reducing the buffer requirements.
2Ease of operation
If one buffer is configured with each switch cell in the daisy chain method, then control signals can be propagated, but the number of buffers increases leading to higher leakage
Solution Approach 1:
Each chain buffer is designed to perform multiple functions: generating control signals for its associated switch cells, propagating the sleep signal to subsequent switch blocks, and generating the acknowledge signal when power gating is complete. This multi-functionality eliminates the need for separate buffer components, reducing overall device complexity.
Solution Approach 2:
The invention merges the control signal generation, signal propagation, and acknowledge signal generation functions into a single chain buffer component. This consolidation reduces the total number of buffers required compared to the traditional daisy chain method where each switch cell has its own buffer.
Data Source
AI summary
A power gating circuit including a first chain buffer that generates a first sleep signal by buffering an input sleep signal, a second chain buffer that generates a second sleep signal by buffering the first sleep signal, and a first switch block including a plurality of first switch cells controlled according to the first sleep signal.