Power Gating Configuration Retention via Interrupt-Driven Memory
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Solution Overview
Problem
Existing power gating technologies in battery-supplied devices lose circuit state information when power is cut off, leading to unknown circuit statuses and increased development costs due to the use of retention flip-flop cells, which also consume more area and current.
Innovation Solution
A control module and method that utilize a power management unit (PMU) to generate interrupt signals, allowing configuration information to be stored and restored via a system bus when the system transitions between active and idle modes, using high-density storage units like SRAM that consume less power and area compared to traditional flip-flop registers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a retention flip-flop cell is used to keep configuration information, then the circuit state can be retained during power gating, but the area and current consumption increase significantly
Solution Approach 1:
The patent extracts the configuration information retention function from the traditional retention flip-flop cell and relocates it to an external memory device. The control module reads configuration information from the memory device before power gating and restores it after power restoration, thereby eliminating the need for dedicated retention flip-flop cells on the chip and reducing area consumption.
Solution Approach 2:
The patent introduces a memory device as an intermediary between the control module and the configuration information. Instead of directly retaining configuration information in flip-flop cells, the system uses the memory device to store and retrieve configuration data, acting as a mediator that enables retention without the area overhead of dedicated retention circuits.
2Reliability
If a retention flip-flop cell is used to keep configuration information, then the circuit state can be retained during power gating, but the current consumption increases
Solution Approach 1:
The patent extracts the configuration information retention function from the traditional retention flip-flop cell and relocates it to an external memory device. The control module reads configuration information from the memory device before power gating and restores it after power restoration, thereby eliminating the need for dedicated retention flip-flop cells on the chip and reducing area consumption.
Solution Approach 2:
The patent uses a standard memory device that can be powered off during power gating operations, rather than maintaining continuous power to retention flip-flop cells. The memory device is temporarily activated only when needed to read or write configuration information, significantly reducing overall current consumption compared to continuously powered retention circuits.
3Loss of energy
If power gating is applied to a specific circuit, then power leakage is reduced, but the configuration information representing circuit state is lost
Solution Approach 1:
The patent performs preliminary action by reading the configuration information from the memory device into the control module before the power gating operation is executed. This ensures that the configuration information is safely stored in the control module's internal registers before power is cut to the specific circuit, preventing any loss of circuit state information.
Solution Approach 2:
The patent maintains continuity of useful action by ensuring that configuration information is preserved across power gating transitions. The control module retains the configuration information during power gating and restores it to the memory device after power is restored to the circuit, ensuring continuous availability of circuit state information without interruption.
Data Source
AI summary
A system having a first mode, a second mode and a system bus comprises a peripheral circuit, a power management unit (PMU), an additional wire and a control module. The peripheral circuit has a configuration information representing a circuit state thereof. The power management unit (PMU) generates an interrupt signal. The additional wire transmits therethrough the interrupt signal. The control module, in response to the interrupt signal, stores the configuration information via the system bus when the system is in the first mode and restores the configuration information via the system bus when the system is in the second mode.