Power Module Capacitor Placement for Parasitic Inductance Reduction
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Solution Overview
Problem
Power modules experience increased power losses and reduced reliability due to parasitic inductance and overvoltage stresses caused by fast switching speeds, which are not effectively mitigated by external capacitors with long electrical leads and associated inductance.
Innovation Solution
Incorporating capacitors inside the power module close to high-temperature power semiconductor components but physically apart from the substrate to reduce parasitic inductance and avoid heat exposure, allowing for effective reduction of parasitic inductance and overvoltage while maintaining the benefits of high-temperature power semiconductor operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If external capacitors are used with long electrical leads, then the power module can be simpler to manufacture, but parasitic inductance increases and overvoltage mitigation becomes ineffective
Solution Approach 1:
The patent extracts the capacitors from external placement and relocates them inside the power module housing, close to the power semiconductor components. This extraction from external mounting eliminates the long electrical leads and associated parasitic inductance, while the capacitors remain accessible for manufacturing. The capacitors are positioned to be electrically close to the switching devices but thermally separated from the substrate.
Solution Approach 2:
The patent introduces an intermediary thermal management approach where the capacitors are placed inside the module but physically separated from the heated substrate. This intermediary positioning allows the capacitors to benefit from the low-inductance electrical connection while being protected from the high-temperature environment by spatial separation, effectively mediating between electrical performance requirements and thermal constraints.
2Reliability
If capacitors are placed close to power semiconductor components, then parasitic inductance is reduced, but capacitors are exposed to high heat flux
Solution Approach 1:
The patent applies local quality by creating different spatial zones within the power module: a high-temperature zone around the substrate and power semiconductor components, and a lower-temperature zone where the capacitors are positioned. The capacitors are placed in the local region close enough to the switching devices for low-inductance connection but far enough from the substrate to avoid excessive heat flux exposure.
Solution Approach 2:
The patent transitions from a two-dimensional planar arrangement to a three-dimensional spatial configuration. Instead of placing capacitors only on the substrate surface or externally, the invention utilizes the vertical dimension and internal module volume to position capacitors in a location that optimizes both electrical proximity and thermal separation, effectively adding a spatial dimension to the design space.
3Productivity
If fast switching speeds are used, then power conversion efficiency is improved, but voltage and current oscillation increases due to parasitic inductance
Solution Approach 1:
The patent implements preliminary action by pre-positioning the capacitors inside the module during manufacturing, establishing low-inductance electrical connections before the module operates at high switching speeds. This preliminary configuration of the electrical circuit minimizes parasitic inductance from the start, preventing rather than correcting voltage and current oscillations that would occur with fast switching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces parasitic inductance and overvoltage stresses, enhancing the electro-thermal characteristics of power modules by keeping capacitors away from heat flux and maintaining the reliability of components with lower thermal capabilities.
Implementation Method 1
The substrate may be exposed to a heat flux based on an operational temperature of the power semiconductor component
Data Source
AI summary
A power-converting apparatus, such as a power module, may include a base plate (16), a first direct current (DC) bus and a second DC bus (22, 24). A power semiconductor component (18, 20) may be electrically coupled to one of the buses, and may be disposed on a substrate (12, 14) physically coupled to the base plate. The power semiconductor component may be made from a high-temperature, wide bandgap material, and the substrate may be exposed to a heat flux based on an operational temperature of the power semiconductor component. At least a first capacitor (50) may be coupled across the first and second DC buses, and at least second and third capacitors (52) may be respectively coupled across respective ones of the first and second buses and an alternating current (AC) return path. Capacitors (50, 52) may each be located inside the power module to establish circuit connections sufficiently proximate to the first power semiconductor component to reduce a formation of parasitic inductances, and further may each be located physically apart from the substrate and thus not exposed to the heat flux.


