Power Module Voltage Clamping Circuit Layout
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Solution Overview
Problem
In power modules, internal switches experience higher instantaneous voltages than detected externally due to parasitic inductances, leading to voltage spikes and increased switching losses, which can damage devices and reduce power density.
Innovation Solution
The voltage clamping circuit is strategically positioned with its components, such as capacitors and diodes, closer to the switch chips to minimize parasitic inductances, using pins and components placed within specific circular areas relative to the switch chips to reduce inductive effects, thereby reducing the instantaneous voltage applied to the switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If switching frequency is increased to reduce power module size, then power density is improved, but switching loss increases
Solution Approach 1:
The voltage clamping circuit is activated before the voltage spike occurs during switching transitions. The circuit proactively clamps the voltage at a predetermined level, preventing the harmful voltage spike from developing fully, thereby reducing switching loss while enabling high-frequency operation for improved power density
2Loss of energy
If gate driving resistance is reduced to increase switching speed, then switching loss is decreased, but voltage spike increases
Solution Approach 1:
The voltage clamping circuit acts as an intermediary protective element between the switching component and the rest of the circuit. It provides a controlled path for the voltage spike, limiting the maximum voltage reached while allowing the low gate driving resistance to maintain high switching speed and low switching loss
3Reliability
If voltage clamping circuit is added to limit voltage spike, then device reliability is improved, but device complexity increases
Solution Approach 1:
The voltage clamping circuit is integrated into the existing power module structure, sharing common elements such as the base plate, mounting holes, and electrical connections with other circuit components. This merging approach adds the voltage clamping function while minimizing the increase in overall device complexity
4Object-affected harmful factors
If voltage clamping circuit components are placed closer to switch chips, then parasitic inductance is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The voltage clamping circuit is designed as a modular assembly with discrete components (capacitor, diode, resistor) that can be independently positioned and mounted. This segmentation allows for optimized placement near the switch chips to minimize parasitic inductance while maintaining reasonable manufacturing tolerances through standardized mounting patterns
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively lowers the instantaneous voltage borne by the switches, improves reliability, reduces the size of the power module, and enhances power density by minimizing parasitic inductances and switching losses.
Implementation Method 1
a voltage clamping circuit comprising a charging loop, wherein the charging loop is assembled on the base plane and connected in parallel with the switch chip for clamping a voltage of the switch chip, and the charging loop comprises a capacitor assembled on the base plane
Data Source
Figure 1~3
Figure 4(a)~5(b)
Figure 6
AI summary
A power module includes: a base plane; at least one switch chip assembled on the base plane; and a voltage clamping circuit for clamping a voltage of the at least one switch chip and comprising components of a charging loop, wherein a projection of at least one of the components of the charging loop on the base plane is located within at least one first circle, defined with a center point of the at least one switch chip as a center of the first circle, and with a product of a maximum of a length and a width of the at least one switch chip and a first coefficient, as a radius of the first circle.