Power Module Switch Circuit Using Mutual Inductance for Current Balance
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Solution Overview
Problem
In high power density power electronics systems, paralleled devices experience dynamic current unbalance due to asymmetrical layouts and different parasitic inductances, leading to gate voltage oscillation, overcurrent, and thermal stress unbalance, which can cause system instability and failure.
Innovation Solution
A switch circuit and power module design that balances dynamic currents through the use of common source inductance by configuring switch bridge arms in parallel with specific terminal connections and mutual inductance arrangements, ensuring balanced current flow across switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple power devices are paralleled to increase current capability, then the current rating of the power electronics system is improved, but the dynamic current unbalance between paralleled devices occurs due to asymmetrical layout and different parasitic inductances
Solution Approach 1:
The patent intentionally introduces asymmetry by adding different inductance values to different paralleled switch bridge arms. Specifically, a first inductance is added to the first switch bridge arm and a second inductance is added to the second switch bridge arm, where these inductances are designed to compensate for the inherent asymmetries in parasitic inductances caused by layout differences. This controlled asymmetry balances the total inductance (parasitic + added) across all paralleled devices, thereby balancing dynamic currents while maintaining high current capability.
2Power
If paralleled devices are used to achieve high power density, then the power output is improved, but gate voltage oscillation and thermal stress unbalance occur due to current unbalance
Solution Approach 1:
The patent applies preliminary anti-action by pre-compensating for the harmful effects of parasitic inductance differences before they cause problems. By calculating the parasitic inductances of each switch bridge arm based on their respective layouts and adding compensating inductances in opposite direction (series or parallel configuration), the total inductance is equalized across all paralleled devices. This prevents gate voltage oscillation and current unbalance from occurring in the first place, thereby maintaining voltage and thermal stability in high power density systems.
3Ease of manufacture
If asymmetrical layout is used in paralleled devices, then the device packaging and connection is simplified, but parasitic inductances become different leading to dynamic current unbalance
Solution Approach 1:
The patent applies local quality by making targeted modifications to specific parts of the circuit rather than requiring uniform changes across the entire system. Each switch bridge arm receives a specifically designed inductance value tailored to its individual parasitic characteristics. This allows the overall asymmetrical layout to be maintained for manufacturing simplicity, while local inductance adjustments compensate for parasitic differences, achieving both ease of manufacture and effective current balance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively balances dynamic currents, enhancing the reliability of the switch circuit and power module by mitigating current imbalances and thermal stress, thereby preventing system instability and failure.
Implementation Method 1
A first mutual inductance is formed between the power loop and the first control loop. Among all the first switches, the first switch with the longer power loop has the smaller first mutual inductance.
Data Source
AI summary
A switch circuit electrically connected to a power source and a first control source and including a plurality of switch bridge arms is provided. Each of the plurality of switch bridge arms includes a first switch and a second switch electrically connected in series. A loop formed by the first switch, the second switch and the power source is defined as a power loop. A loop formed by the first control source and the first switch is defined as a first control loop. A first mutual inductance is formed between the power loop and the first control loop. Among all the first switches, the first switch with the longer power loop has the smaller first mutual inductance.