Power Module with Overlapping Conductors for Parasitic Inductance Reduction
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Solution Overview
Problem
Existing power modules have large parasitic inductance and poor heat dissipation performance, which affects the reliability and efficiency of power electronic devices.
Innovation Solution
A power module design featuring a specific configuration of conductors and switches with overlapping areas on reference planes, where the projections of the P and N electrode conductors have an overlap area, and upper and lower bridge arm switches are interlaced to reduce parasitic inductance and enhance heat dissipation by uniform heat distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional power module packaging is used, then the module structure is simple and easy to manufacture, but the parasitic inductance is large and heat dissipation performance is poor
Solution Approach 1:
The patent transitions from planar conductor layout to three-dimensional overlapping conductor configuration. The first and second conductors are disposed at different reference planes with their projections overlapping, creating a multi-layer conductive structure that reduces parasitic inductance while maintaining manufacturing feasibility through standardized layering processes.
Solution Approach 2:
The patent merges the functions of multiple conductors by making their projections overlap in the same planar area. This consolidation of conductor paths within overlapping areas reduces the overall current loop area and parasitic inductance, while the interlaced switch arrangement merges heat generation zones to improve thermal distribution.
2Reliability
If larger gate resistance is used to reduce voltage spike, then device reliability improves, but switching speed decreases and switching loss increases
Solution Approach 1:
The patent converts the harmful effect of parasitic inductance into a beneficial design parameter by deliberately creating overlapping conductor areas that cancel magnetic fields. The interlaced arrangement of first and second switches with overlapping conductor projections transforms the voltage spike problem into an opportunity for optimized switching performance with smaller gate resistance.
3Temperature
If heat is concentrated in specific areas, then heat transfer path is short, but hot spots form and heat dissipation performance deteriorates
Solution Approach 1:
The patent applies local quality by creating specific overlapping areas where conductors are strategically positioned. The first and second conductors overlap in defined regions to reduce parasitic inductance, while first and second switches are interlaced in overlapping areas to distribute heat generation locally, preventing hot spots while maintaining efficient heat transfer paths.
Data Source
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AI summary
A power module, including: a first conductor (10), disposed at a first reference plane; a second conductor (20), disposed at a second reference plane, wherein projections of the first and second conductors (20) on the first reference plane have a first overlap area; a third conductor (30, 3001, 3002, 3003), disposed at a third reference plane; a plurality of first switches (711, 712, 713, 714, 7111, 7112, 7113, 7114, 7121, 7122, 7123, 7124, 7131, 7132, 7133, 7134), first ends of which are coupled to the first conductor (10); and a plurality of second switches (721, 722, 7211, 7212, 7221, 7222, 7231, 7232), first ends of which are coupled to second ends of the first switches (711, 712, 713, 714, 7111, 7112, 7113, 7114, 7121, 7122, 7123, 7124, 7131, 7132, 7133, 7134) through the third conductor (30, 3001, 3002, 3003), and second ends of the second switches (721, 722, 7211, 7212, 7221, 7222, 7231, 7232) are coupled to the second conductor (20), wherein projections of minimum envelope areas of the first and second switches (721, 722, 7211, 7212, 7221, 7222, 7231, 7232) on the first reference plane have a second overlap area, and the first and second overlap areas have an overlap region. Heat sources of the power module are evenly distributed and its parasitic inductance is low.