Power Semiconductor Device with Asymmetric Backside Emitter
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Solution Overview
Problem
Power semiconductor devices face challenges in increasing dynamic robustness during switch-off while minimizing on-state losses, particularly in reducing charge carrier density at edge portions to prevent dynamic avalanche and latch-up.
Innovation Solution
The power semiconductor device incorporates a semiconductor body with a front side structure that includes a drift region and a backside emitter region with varying dopant concentrations, where the backside emitter region terminates at different distances from the lateral edge and corner portions, and a field stop region with varying dopant concentrations to manage charge carrier density and lifetime.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the backside emitter region is extended closer to the lateral edge portions to increase the backside active area, then the on-state losses are reduced, but the dynamic robustness deteriorates due to increased charge carrier density at edge portions causing dynamic avalanche and latch-up
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different regions of the backside emitter region. The distance parameter d2 to corner portions is made larger than distance d1 to lateral edge portions, creating locally different charge carrier densities. This allows the emitter region to be extended closer to lateral edges (reducing on-state losses) while maintaining larger distance from corners (preserving dynamic robustness), thus optimizing both contradictory requirements through spatially differentiated properties.
2Reliability
If measures are taken to increase dynamic robustness by reducing charge carrier density at edge portions, then dynamic avalanche and latch-up are prevented, but on-state losses increase due to smaller backside active area
Solution Approach 1:
The patent resolves this contradiction by implementing local quality through asymmetric distance parameters. The backside emitter region is positioned at distance d1 from lateral edge portions and distance d2 from corner portions, where d2 > d1. This local differentiation allows charge carrier density to be higher near lateral edges (improving conduction) while remaining lower near corners (maintaining robustness), thereby achieving both dynamic robustness and low on-state losses simultaneously.
3Ease of manufacture
If the backside emitter region is positioned closer to corner portions to maximize active area, then manufacturing efficiency is improved, but the device becomes more susceptible to dynamic avalanche and latch-up due to high charge carrier density at corners
Solution Approach 1:
The patent addresses this contradiction through local quality by establishing different distance parameters for different geometric features. The backside emitter region is positioned at distance d2 from corner portions and distance d1 from lateral edge portions, with d2 > d1. This creates locally optimized charge carrier density distribution that prevents avalanche and latch-up at corners while maintaining efficient active area utilization.
Solution Approach 2:
The patent applies preliminary anti-action by proactively positioning the backside emitter region at optimized distances from corner portions before device operation. The distance d2 is specifically designed to be larger than d1 to preemptively prevent the accumulation of excessive charge carriers at corner portions, thereby preventing dynamic avalanche and latch-up before they can occur during device switching operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances dynamic robustness by controlling charge carrier density and lifetime, reducing the risk of dynamic avalanche and latch-up while maintaining low on-state losses.
Implementation Method 1
a drift region of a first conductivity type being included in the semiconductor body and being configured for carrying the load current
Implementation Method 2
the backside emitter region may be configured for injecting charge carriers into the drift region in a conducting state of the power semiconductor device
Implementation Method 3
The drift region may comprise a field stop region having a higher dopant concentration than portions of the drift regions external of the field stop region
Data Source
AI summary
A power semiconductor device includes a semiconductor body having a front side coupled to a first load terminal structure and a backside coupled to a second load terminal structure. A front side structure arranged at the front side is at least partially included in the semiconductor body and defines a front side active region configured to conduct a load current between the load terminal structures. The front side structure includes first and second lateral edge portions and a first corner portion that forms a transition between the lateral edge portions. A drift region included in the semiconductor body is configured to carry the load current. A backside emitter region arranged in the semiconductor body in contact with the second load terminal has a net dopant concentration higher than a net dopant concentration of the drift region.