Power Semiconductor Drift Buffer Layer Design
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Solution Overview
Problem
Existing power semiconductor elements face challenges in simultaneously reducing specific On-resistance and maintaining high avalanche resistivity, often resulting in decreased blocking voltage at moderate current densities, which can lead to thermal destruction due to excessive current density.
Innovation Solution
Incorporating a lightly doped drift and buffer layer with a minimum vertical extension and specific dopant concentration to create a safety zone that dynamically extends the space-charge region, thereby increasing the maximum electrical field strength and achieving higher blocking voltage, particularly in power semiconductor elements with reverse voltage classes between 40 V to 1200 V.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the specific On-resistance is reduced to minimize static power loss and achieve higher current densities, then the blocking voltage decreases and the element becomes vulnerable to thermal destruction
Solution Approach 1:
The patent applies local quality by creating a drift and buffer layer with specific local doping characteristics (lightly doped region with controlled dopant concentration between 10^15 to 10^17 atoms/cm³) in the vertical extension between deep well regions. This localized doping structure optimizes the electrical field distribution specifically in the blocking region, enabling simultaneous reduction of On-resistance and maintenance of high blocking voltage without uniform structural changes throughout the entire device.
2Productivity
If higher current densities are achieved through reduced On-resistance, then smaller semiconductor elements can be used, but the element becomes susceptible to thermal destruction due to excessive current density
Solution Approach 1:
The patent implements beforehand cushioning by introducing a drift and buffer layer with carefully controlled dopant concentration and vertical extension before the high current density operation occurs. This pre-configured layer structure creates a safety zone that dynamically extends the space-charge region during operation, cushioning against excessive electric fields and preventing thermal destruction before it can occur.
Solution Approach 2:
The patent applies parameter changes by precisely controlling the dopant concentration (10^15 to 10^17 atoms/cm³) and vertical extension dimensions of the drift and buffer layer. These parameter optimizations enable the structure to handle higher current densities while maintaining safety margins against thermal destruction, allowing smaller device dimensions without compromising reliability.
3Loss of energy
If progress is made in optimizing one important parameter, then the other important parameter cannot be maintained at a favourable level
Solution Approach 1:
The patent applies universality by designing the drift and buffer layer to serve multiple functions simultaneously: it reduces On-resistance for lower static power loss, maintains high blocking voltage, and provides thermal protection. This multi-functional structure eliminates the need for separate optimization of each parameter, resolving the contradiction between energy efficiency and device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively enhances the blocking voltage and reduces static power loss, allowing for smaller and cheaper semiconductor elements while maintaining high current densities without thermal destruction.
Implementation Method 1
create a safety zone that dynamically extends the space-charge region, thereby increasing the maximum electrical field strength and achieving higher blocking voltage
Implementation Method 2
Another parameter of such semiconductor element is a high resistivity against avalanche breakdown in the blocking or reverse operation mode of the element
Data Source
AI summary
A power semiconductor element having a lightly doped drift and buffer layer is disclosed. One embodiment has, underneath and between deep well regions of a first conductivity type, a lightly doped drift and buffer layer of a second conductivity type. The drift and buffer layer has a minimum vertical extension between a drain contact layer on the adjacent surface of a semiconductor substrate and the bottom of the deepest well region which is at least equal to a minimum lateral distance between the deep well regions. The vertical extension can also be determined such that a total amount of dopant per unit area in the drift and buffer layer is larger than a breakdown charge amount at breakdown voltage.