Power Semiconductor Device Sensor Region ESD Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power semiconductor devices face a challenge in securing appropriate ESD capacitance in sensor regions due to their smaller size compared to main operation cells, which compromises their withstand voltage property during high-speed switching operations.
Innovation Solution
Incorporating a protection resistance layer across the insulation region between the main cell and sensor regions, connected to both power semiconductor and current sensor transistors, which allows current distribution under abnormal conditions, thereby enhancing capacitance characteristics in the sensor region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the sensor region area is reduced to achieve high-speed switching operation, then switching speed is improved, but ESD capacitance is insufficient
Solution Approach 1:
The patent merges the sensor region with the main cell region by removing the insulation region between them. This allows the sensor region to utilize the capacitance of the main cell region, effectively increasing the ESD capacitance available in the sensor region without increasing its physical area, thus resolving the contradiction between small area and sufficient capacitance for high-speed operation.
2Speed
If on-resistance is reduced for high-speed operation, then switching speed is improved, but withstand voltage property is reduced
Solution Approach 1:
The patent applies local quality by having different regions serve different functions: the main cell region is optimized for high-speed switching with low on-resistance, while the sensor region (now merged) benefits from the high withstand voltage capability of the main cell region's capacitance structure. This allows each region to operate optimally without compromising the other.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the capacitance characteristics of the sensor region, effectively protecting it from electrostatic discharge (ESD) and maintaining high-speed switching performance while maintaining adequate withstand voltage.
Implementation Method 1
a protection resistance layer disposed on the semiconductor layer across the insulation region so that at least a portion of the plurality of power semiconductor transistors and at least a portion of the plurality of current sensor transistors are connected to each other under an abnormal operation condition
Data Source
AI summary
A power semiconductor device includes: a semiconductor layer including a main cell region, a sensor region, and an insulation region between the main cell region and the sensor region; a plurality of power semiconductor transistors disposed on the main cell region; a plurality of current sensor transistors disposed on the sensor region; and a protection resistance layer disposed on the semiconductor layer across the insulation region so that at least a portion of the plurality of power semiconductor transistors and at least a portion of the plurality of current sensor transistors are connected to each other under an abnormal operation condition.