Power Semiconductor Device With Variable Wire Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power semiconductor devices experience uneven voltage application across MOSFETs due to wiring resistance variations, leading to current imbalances and reliability issues.
Innovation Solution
The design adjusts the width and resistance of metal wires corresponding to the current flow direction, ensuring that the resistance values of wires connected to MOSFETs are lower and those on which MOSFETs are mounted are higher, thereby equalizing the voltage drop across all elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If equal-length wires are used to connect MOSFETs, then parasitic inductance is equalized, but voltage ununiformity occurs due to wiring resistance variations
Solution Approach 1:
The patent applies local quality by making each wire have different resistance values according to its specific position and function in the circuit. Wires connecting to MOSFETs have lower resistance, while wires on which MOSFETs are mounted have higher resistance, creating localized resistance characteristics that compensate for voltage drops and achieve uniform voltage distribution across all MOSFETs.
2Reliability
If wire resistance is reduced to minimize voltage drop, then current distribution improves, but wire dimensions and cost are affected
Solution Approach 1:
The patent changes the resistance parameter of wires from a uniform value to differentiated values based on position. By adjusting wire resistance as a key parameter - making connection wires have lower resistance and mounting wires have higher resistance - the system achieves uniform voltage distribution without requiring all wires to have the same specifications, thus managing complexity through intentional parameter variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses voltage ununiformity between the source and drain of MOSFETs, enhancing the reliability and efficiency of power semiconductor devices by ensuring consistent current distribution.
Implementation Method 1
the wiring resistances of the metal wire 104 (see Figure 7) are denoted by Ra1 to Ra4, the wiring resistances of the region of the metal wire 105 (see Figure 7), to which wires 109 are connected, are denoted by Rb1 to Rb4
Implementation Method 2
The gate electrode 111 and source electrode 121s of each element are connected to a gate electrode terminal 113 and a source electrode terminal 114 by a bonding wire 112 which is made from aluminum or gold respectively
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
The present invention relates to a power semiconductor device, which performs power conversion by driving in parallel three or more power semiconductor elements, and the purpose of the present invention is to reduce variance of a voltage to be applied between the terminals of each of the power semiconductor elements, and to improve lifetime of the power semiconductor elements and reliability of the power semiconductor device. In order to achieve the purpose, in this power semiconductor device, which is provided with three or more power semiconductor elements (701-704) that are aligned and mounted on a metal wire (4), and another metal wire (5) different from the metal wire-(4), one terminal of each of the power semiconductor elements being connected to the wire (4) and another one terminal thereof being connected to the wire (5), the resistance value of the metal wire (4) in a region where the power semiconductor elements (701-704) are mounted is higher in the downstream side than that in the upstream side in the electric current flowing direction.