Power Supply Wiring Structure for Electro Migration Suppression
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Solution Overview
Problem
The semiconductor integrated circuit faces significant challenges with electro migration (EM) in power supply wirings, particularly due to increased electric current density and the complexity of current paths, which complicates the calculation of allowable current density and leads to issues like meteoric failure and increased via density, hindering the reduction of semiconductor circuit size.
Innovation Solution
A power supply wiring structure is designed with a first and second power supply wiring crossing each other, along with extension wiring and additional vias to connect these, allowing for increased via density at critical areas to mitigate EM, thereby reducing the overall power supply area and improving yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via density is increased to reduce meteoric failure, then reliability is improved, but EM problem increases due to decreased via cross sectional area
Solution Approach 1:
The patent applies local quality by differentiating via density requirements for signal wirings versus power supply wirings. Specifically, signal wirings use high via density to prevent meteoric failure, while power supply wirings use low via density to prevent EM. This localized differentiation allows each wiring type to have optimal via density for its specific function and failure mode.
Solution Approach 2:
The patent transitions from a uniform via density approach to a multi-dimensional approach by separating via density control for different wiring layers and wiring types. Power supply wirings are assigned dedicated vias with lower density requirements, while signal wirings use higher density vias, creating a dimensional separation in via allocation strategies.
2Object-affected harmful factors
If power supply wiring width is increased to reduce EM, then EM resistance is improved, but device area increases
Solution Approach 1:
The patent segments the power supply network into multiple independent power supply wirings distributed across different layers. Instead of relying on a single wide power supply wiring, the current path is divided into multiple segments (different power supply wirings), each with moderate width, collectively providing sufficient EM resistance while maintaining compact area.
Solution Approach 2:
The patent moves from a two-dimensional planar expansion (wider single wiring) to a three-dimensional multi-layer structure. Power supply wirings are distributed across multiple layers (first power supply wiring on one layer, second power supply wiring on another layer), utilizing the vertical dimension to provide redundant current paths without increasing planar area.
3Device complexity
If via density is decreased to avoid meteoric failure, then manufacturing complexity is reduced, but EM problem worsens due to insufficient via cross sectional area
Solution Approach 1:
The patent applies local quality by assigning different via density characteristics to different wiring types. Power supply wirings are specifically designed with lower via density to avoid meteoric failure, while maintaining sufficient total via cross sectional area through optimized via dimensions and placement, thereby reducing local complexity without compromising EM resistance.
Solution Approach 2:
The patent changes the parameters of vias connected to power supply wirings, specifically optimizing via diameter and spacing to achieve lower via density while maintaining sufficient total conductive area. This parameter optimization allows reduced via density (simpler manufacturing) while preventing EM through adequate current carrying capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses EM by optimizing via density and reducing the power supply area, enhancing the semiconductor integrated circuit's productivity and size reduction capabilities.
Implementation Method 1
a first via for interlayer-connecting the first and second power supply wirings
Implementation Method 2
an extension wiring which is formed by partially extending at least either the first power supply wiring or the second power supply wiring from the crossing area
Implementation Method 3
When an electric current is flown into such minute wirings, migration of electrons occurs. The migrated electrons urge atoms (for example, copper atoms, aluminum atoms, etc), which forms the wiring, thus causing an atomic depletion (void).
Implementation Method 4
a second via for interlayer-connecting the extension wiring and either the first power supply wiring or the second power supply wiring
Data Source
AI summary
Provided is a power supply wiring structure which comprises a first and a second power supply wirings, which are disposed on different planes to cross each other two-dimensionally. The first and second power supply wirings are interlayer-connected by a first via at a crossing area where those power supply wirings cross each other. An extension wiring which is formed by partially extending from the crossing area along a wiring extending direction of other power supply wiring is provided at least to either the first power supply wiring or the second power supply wiring. The extension wiring and either the first power supply wiring or the second power supply wiring, which are disposed on a different plane from the extension wiring to face the extension wiring, are interlayer-connected by a second via. Thereby, generation of electro migration can be suppressed.