PPM Frequency Offset Detection Without a Third Reference Clock
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Solution Overview
Problem
Existing PPM frequency offset detectors require a third reference clock signal and have high power requirements, making them inefficient for detecting frequency offsets between two clock signals.
Innovation Solution
A PPM frequency offset detector that utilizes two asynchronous clock signals to detect the faster clock signal without a third reference clock, using M-bit counters and an offset counter clock controller to enable and disable counting based on the faster clock, eliminating the need for phase locked loops and loop filters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a third reference clock signal is used in existing PPM frequency offset detectors, then frequency offset detection accuracy is improved, but device complexity and power requirements increase
Solution Approach 1:
The patent extracts and eliminates the unnecessary third reference clock signal from the detection system. By using only the two original clock signals (CLKA and CLKB) that need to be compared, the system removes the additional reference clock component, thereby reducing device complexity and power consumption while maintaining detection functionality through the counter-based comparison mechanism
Solution Approach 2:
The counters in the patent serve multiple functions: they act as frequency dividers, time measurement devices, and comparison instruments simultaneously. This multi-functionality eliminates the need for separate reference clock circuitry, reducing overall system complexity while maintaining the ability to detect frequency offsets between the two clock signals
2Measurement precision
If existing PPM frequency offset detectors are implemented with traditional circuitry, then frequency offset detection is achieved, but power consumption increases
Solution Approach 1:
The patent removes power-consuming components including the third reference clock signal generator and associated phase-locked loop circuitry. By extracting these unnecessary elements and relying solely on the two input clock signals and counter logic, the system achieves frequency offset detection with significantly reduced power consumption
Solution Approach 2:
The system uses the two clock signals themselves (CLKA and CLKB) to perform the detection function without requiring external reference signals. The counters automatically compare the clock signals' frequencies through their natural counting operation, eliminating the need for additional power-hungry reference clock generation and phase synchronization circuitry
3Measurement precision
If phase locked loops and loop filters are used in frequency offset detection, then detection accuracy is improved, but device complexity and power requirements increase
Solution Approach 1:
The patent extracts and eliminates phase-locked loop (PLL) and loop filter circuitry from the detection system. By using direct counter comparison of the two clock signals, the system achieves frequency offset detection without these complex analog/digital hybrid circuits, thereby reducing device complexity and power consumption while maintaining detection capability
Solution Approach 2:
The patent replaces the mechanical/analog PLL and loop filter system with a digital counter-based comparison mechanism. Instead of using analog phase detection and filtering circuits, the system uses digital counters to measure and compare the frequencies of the two clock signals, achieving the same detection function with simpler digital logic
Data Source
AI summary
Embodiments herein describe circuitry and techniques to implement an enhanced PPM frequency offset detector and methods for implementing operational functions of one or more embodiments of the PPM frequency offset detector to detect a frequency offset between two clock signals. An enhanced PPM frequency offset detector of one or more embodiments reduces circuitry and power requirements, eliminating circuitry requirements of a third reference clock signal to detect the frequency offset of some traditional arrangements, and effectively and efficiently detects a PPM frequency offset between two clock signals.