PCB Fine Trace Manufacturing via PPR Plating and rGO Modification
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Solution Overview
Problem
Conventional methods for manufacturing fine traces on printed circuit boards (PCBs) face issues such as thick and uneven copper deposits, undercut during etching, uneven thicknesses, and non-square profiles, particularly for features below 30/30 μm.
Innovation Solution
The method involves modifying via walls and bottoms with reduced graphene oxide (rGO) and using a periodic pulse reverse (PPR) pattern plating process to superfill vias with copper, forming a thin flat copper layer, and then depositing copper with precise thickness control through PPR plating, followed by removal of the anti-plating film and etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional electroless plating is used to deposit copper on via walls, then copper deposition occurs, but the deposited copper layer becomes thick and uneven
Solution Approach 1:
The patent applies a preliminary copper deposition step before the main pattern plating process. This preliminary copper layer serves as a base that ensures uniform thickness and provides a foundation for subsequent trace formation, preventing the thick and uneven deposition issues encountered in conventional direct plating methods
Solution Approach 2:
The patent employs periodic pulse reverse (PPR) plating process where current direction alternates between forward and reverse phases. This periodic action prevents copper deposition on unwanted areas while allowing controlled copper buildup on trace areas, achieving uniform thickness without the thick uneven layers problem
2Loss of substance
If conventional etching is used to remove unwanted copper, then unwanted copper is removed, but undercut occurs during etching
Solution Approach 1:
The patent forms a preliminary copper layer with controlled thickness and uniform distribution before etching. This preliminary structure serves as a sacrificial layer that protects the final trace geometry during etching, preventing undercut by providing a buffer that can be selectively removed without affecting the underlying trace profile
Solution Approach 2:
The patent modifies etching parameters including using controlled etchant concentration, temperature, and exposure time. These parameter changes enable precise etching that removes unwanted copper while maintaining vertical sidewalls and preventing undercut, achieving square trace profiles with high manufacturing precision
3Manufacturing precision
If conventional plating is used to form traces, then copper traces are formed, but profiles are not square
Solution Approach 1:
The patent employs periodic pulse reverse plating where alternating current phases create uniform copper deposition with vertical sidewalls. The reverse phase removes loosely bound copper and prevents rounded profiles, while the forward phase deposits copper in a controlled manner to form square trace profiles
Solution Approach 2:
The patent adjusts critical plating parameters including current density, pulse duration, and duty cycle to achieve square trace profiles. These parameter changes control the deposition kinetics to promote vertical sidewall formation and prevent rounding, achieving superior trace geometry with widths and spaces of 3-50 μm
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of PCBs with fine traces having widths and interval spaces of 3-50 μm, achieving even thicknesses and square profiles with reduced variations, improving the manufacturing process without requiring significant equipment or material upgrades.
Implementation Method 1
depositing copper on the area of traces with thicknesses of 5-50 μm at a variation of less than 15% through a periodic pulse reverse (PPR) plating process
Implementation Method 2
superfilling the vias with copper and forming a thin flat copper layer with a thickness of 1-20 μm at a variation less than 10% through an electroplating process
Data Source
AI summary
A method for manufacturing traces of a printed circuit board (PCB) comprises an application of the periodic pulse reverse (PPR) pattern plating process. In the first stage, walls and bottoms in drilled holes of the PCB are modified with reduced graphene oxide (rGO) so that the vias can be formed by filling with copper and a very thin copper layer can be formed on the substrate through the electroplating process. In the second stage, a pattern of very fine traces with width/space less than 30/30 μm is formed on the thin copper layer and then the traces are formed through the PPR pattern plating process. After removing unwanted copper layer, the traces with even thicknesses and square profiles are achieved and thus conform to requirements of the high density interconnection (HDI) technology.