Post Package Repair Circuit with Shared Antifuse Resources
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Solution Overview
Problem
Conventional semiconductor memory devices face inefficiencies in storage space and array usage due to the separate requirements for Post Package Repair (PPR) and Soft Post Package Repair (SPPR) operations, which demand significant resources for antifuses and registers, impacting yield and efficiency.
Innovation Solution
A post package repair circuit that includes a fuse control circuit, pump circuit, antifuse latch circuits, and comparators to manage PPR and SPPR operations efficiently, utilizing two fuse sets for sharing between modes, allowing for dynamic selection and storage of repair addresses, thereby optimizing resource usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate antifuses and registers are provided for PPR and SPPR operations, then both PPR and SPPR can be performed, but storage space and device complexity increase significantly
Solution Approach 1:
The patent implements a unified repair circuit that can perform both PPR (permanent repair) and SPPR (soft repair) operations using shared antifuse and register resources. The circuit includes a mode selection mechanism that allows the same physical resources to be dynamically allocated between different repair modes, eliminating the need for separate dedicated circuits for each repair type.
Solution Approach 2:
The patent merges the PPR and SPPR circuits into a single integrated repair unit. The antifuse array and register file are combined into shared resources, with control logic that routes operations appropriately based on the selected repair mode. This consolidation reduces the total number of components while maintaining full functionality for both repair types.
2Reliability
If standard antifuses are dedicated to PPR functionality, then permanent repair can be achieved, but array usage efficiency decreases
Solution Approach 1:
The patent introduces dynamic resource allocation where the antifuse array can be selectively activated for PPR operations when needed, and deactivated or repurposed for SPPR operations during other periods. The control circuitry dynamically switches between repair modes based on defect detection results and system requirements, maximizing resource utilization while maintaining permanent repair capability when necessary.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the semiconductor memory device's efficiency by optimizing the use of resources, allowing for effective execution of both PPR and SPPR operations within the same circuit, improving yield and reducing storage needs.
Implementation Method 1
an antifuse may have a high resistance in its initial state, and can permanently create an electrically conductive path ('blow an antifuse') when a relatively high voltage is applied across the antifuse
Data Source
AI summary
Apparatuses for memory repair for a memory device are described. An example apparatus includes: a non-volatile storage element that stores information; a storage latch circuit coupled to the non-volatile storage element and stores latch information; and a control circuit that, in a first repair mode, receives first repair address information, provides the first repair address information to the non-volatile storage element, and further transmits the first repair address information from the non-volatile storage element to the storage latch circuit. The control circuit, in a second repair mode, receives second repair address information and provides the second repair address information to the storage latch circuit and disables storing the second address information into the non-volatile storage element.