PRAM Multi-Level Cell Electrode Structure for Distinct Resistance Levels

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Solution Overview

Problem

Phase-change random access memories (PRAMs) face challenges in achieving multiple resistance levels for increased memory density, as existing multi-level cell programming methods often fail to produce distinct resistance levels, limiting data storage capacity without increasing memory size.

Innovation Solution

A non-volatile memory device is designed with a specific electrode structure and resistive patterns, including first and second electrodes with different resistivities, and resistive patterns with varying widths and materials, allowing for multiple resistance levels by applying distinct set and reset currents to the data storage pattern, enabling efficient switching between crystalline and amorphous states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-level cells are implemented to store multi-bits data in one cell, then memory density is increased, but the ability to produce distinct resistance levels is insufficient

Engineering Contradiction:
Improvememory densityVSAvoiddistinct resistance levels
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent applies local quality by creating non-uniform resistive patterns with varying widths and materials in different regions of the memory cell. The first and second resistive patterns have different widths and material compositions, creating localized variations in resistance that enable distinct resistance levels when combined with the phase-change material's crystalline and amorphous states

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite materials by combining phase-change material with multiple resistive patterns of different materials and geometries. The data storage pattern includes a phase-change material layer combined with first and second resistive patterns made of different materials with different widths, creating a composite structure that produces multiple distinct resistance levels through the interaction of these different material properties

Inventive Principle:
Principle #40Composite materials

2Ease of operation

If existing multi-level cell programming methods are used, then programming is simplified, but distinct resistance levels cannot be achieved

Engineering Contradiction:
Improveprogramming simplicityVSAvoidresistance level distinction
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent applies parameter changes by varying multiple parameters of the resistive patterns including width, material composition, and geometric configuration. The first resistive pattern has a first width and the second resistive pattern has a second width different from the first width, and they are made of different materials, creating distinct resistance characteristics that enable clear differentiation between multiple resistance levels

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The device effectively programs the data storage pattern to achieve four distinct resistance levels, enhancing programming efficiency and memory density by clearly distinguishing between resistance levels, thereby improving data storage capacity.

Implementation Method 1

enabling efficient switching between crystalline and amorphous states

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 2

the second electrode may have a resistivity greater than that of the first electrode

Methodology Applied
Scientific EffectElectrical resistivity: Electrical Resistance

Data Source

PatentUS9130160B2Non-volatile memory device having multi-level cells and method of forming the same
Publication Date: 2015.09.08 SAMSUNG ELECTRONICS CO LTD
  • US9130160B2 patent drawing
  • US9130160B2 patent drawing
  • US9130160B2 patent drawing

AI summary

A non-volatile memory device including multi-level cells is provided. The device includes first and second conductive patterns. Additionally, the device includes an electrode structure and a data storage pattern between the first and second conductive patterns. The data storage pattern may include a phase change material and a first vertical thickness of a first portion of the data storage pattern may be less than a second vertical thickness of a second portion of the data storage pattern. The electrode structure may include first and second electrodes and a vertical thickness of the first electrode may be greater than that of the second electrode.