PRAM Internal Voltage Circuit Dynamic Mode Adjustment

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Solution Overview

Problem

Phase change random access memory (PRAM) devices face challenges in applying sufficient current during programming operations due to voltage drops from parasitic resistance, necessitating boost voltages that waste energy and shorten device lifespan when continuously applied during read and standby modes.

Innovation Solution

A dynamic internal voltage generating circuit that adjusts voltage levels based on operation modes using a divided voltage generator, voltage detector, and under-driving unit to optimize voltage levels for programming, read, and standby operations, minimizing power consumption and extending device lifespan.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a boost voltage is used to apply sufficient current during programming operation, then the current application capability is improved, but power consumption increases and device lifespan decreases when continuously applied during read and standby modes

Engineering Contradiction:
Improvecurrent application capabilityVSAvoidpower consumption
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The voltage generating circuit dynamically adjusts the output voltage level based on the operation mode. During programming operations, the circuit generates a first voltage level (boost voltage) sufficient to overcome parasitic resistance and apply adequate current to phase change memory cells. During read and standby operations, the circuit switches to a second voltage level (supply voltage) that is lower and sufficient for these modes, thereby reducing power consumption and extending device lifespan when boost voltage is not required.

Inventive Principle:
Principle #15Dynamics

2Reliability

If a boost voltage is continuously applied to internal circuits, then sufficient current can be maintained, but the lifespan of internal circuits is shortened

Engineering Contradiction:
Improvecurrent stabilityVSAvoiddevice lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The circuit transitions from a static voltage supply to a dynamic voltage generator that adapts its output based on operational requirements. The voltage generator produces a first voltage level (boost voltage) only when programming operations are detected, and switches to a second voltage level (supply voltage) during read and standby operations. This dynamic adjustment ensures sufficient current is available when needed while reducing voltage stress on internal circuits during other operations, thereby extending device lifespan.

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If a driver receives current from supply voltage during programming operation, then the driver can operate, but voltage to select phase change cells becomes insufficient due to voltage drop from parasitic resistance

Engineering Contradiction:
Improvedriver operationVSAvoidvoltage selection capability
Core Design Contradiction:
Ease of operationVSStress or pressure

Solution Approach 1:

The voltage generating circuit changes the voltage parameter based on the operation mode. During programming operations, the circuit generates a first voltage level (boost voltage) that is higher than the supply voltage, providing sufficient voltage to overcome parasitic resistance and ensure adequate voltage reaches the driver and phase change memory cells for proper operation. During read and standby operations, the circuit uses a second voltage level (supply voltage) that is sufficient for these modes but lower than the boost voltage, as the higher voltage is not needed and would waste power.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The circuit effectively generates target voltage levels for PRAM devices, ensuring sufficient voltage for programming while reducing unnecessary current consumption and prolonging device lifespan by dynamically adjusting voltage levels according to operation modes.

Implementation Method 1

a divided voltage generator configured to generate a divided voltage by dividing a feedback internal voltage level at a division ratio corresponding to an operation mode control signal

Methodology Applied
Scientific EffectVoltage division:

Implementation Method 2

a voltage detector configured to detect a level of the divided voltage based on a reference voltage level and generate an output signal

Methodology Applied
Scientific EffectVoltage detection:

Implementation Method 3

an internal voltage generator configured to receive a supply voltage as a power source and generate the internal voltage in response to an output signal of the voltage detector

Methodology Applied
Scientific EffectCharge pumping:

Implementation Method 4

an under-driving unit configured to under-drive an internal voltage terminal to a supply voltage in an under-driving operation region that is determined in response to the operation mode control signal

Methodology Applied
Scientific EffectVoltage control:

Data Source

PatentUS8767451B2Internal voltage generating circuit of phase change random access memory device and method thereof
Publication Date: 2014.07.01 SK HYNIX INC
  • US8767451B2 patent drawing
  • US8767451B2 patent drawing
  • US8767451B2 patent drawing

AI summary

An internal voltage generating circuit includes a divided voltage generator configured to generate a divided voltage by dividing a feedback internal voltage level at a division ratio corresponding to an operation mode control signal, a voltage detector configured to detect a level of the divided voltage based on a reference voltage level, an internal voltage generator configured to receive a supply voltage as power source and generate the internal voltage in response to an output signal of the voltage detector, and an under-driving unit configured to under-drive an internal voltage terminal to a supply voltage in an under-driving operation region that is determined in response to the operation mode control signal.