Pre-charge Transistor Control for Memory Power Reduction
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Solution Overview
Problem
Memory devices with global data line drivers face errors during read operations at low supply voltages and increased power consumption due to unnecessary current flow through pre-charge transistors, even in standby states.
Innovation Solution
A pre-charge transistor control circuit that turns on the pre-charge transistor only when necessary, specifically during low voltage mode operations and when a read datum is high, ensuring it remains off in standby states with low data values, using an auxiliary logic signal to manage the pre-charge transistor's state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a pre-charge transistor is continuously on to ensure correct data transfer at low supply voltages, then data transfer reliability is improved, but power consumption increases due to continuous current flow
Solution Approach 1:
The pre-charge transistor's state is dynamically adjusted based on operational conditions. The control circuit generates the PRE_N signal to turn the pre-charge transistor on only when necessary (during low voltage mode operations with high read data or in non-standby states), and turns it off during standby states or when read data is low, transitioning from a static continuously-on state to a dynamic conditional state that resolves the contradiction between reliability and power consumption
Solution Approach 2:
The invention changes the control parameter of the pre-charge transistor from a fixed on-state to a variable state controlled by the PRE_N signal. By monitoring operational parameters (supply voltage mode, standby state, read data value) and adjusting the pre-charge transistor's conduction state accordingly, the system optimizes the balance between ensuring correct data transfer when needed and minimizing power consumption during idle or low-risk conditions
2Use of energy by moving object
If the pre-charge transistor has large resistance to limit current flow, then power consumption is reduced, but current flow becomes insufficient to ensure proper transistor switching
Solution Approach 1:
The pre-charge transistor's resistance is dynamically adjusted through temporal switching. During standby states or when read data is low, the transistor maintains large resistance (off state) to minimize power consumption. During active low voltage mode operations with high read data, the transistor switches to low resistance (on state) to ensure sufficient current flow for reliable transistor switching and data transfer, thus resolving the contradiction between power consumption and switching reliability through time-dependent resistance adjustment
Data Source
AI summary
A memory device includes a pre-charge transistor for connecting/disconnecting the input line of a global data line driver to a supply voltage line. To reduce the flow of current through the pre-charge transistor even in a stand-by state, the pre-charge transistor is turned on when, at a same time, an enabling signal of a page buffer is asserted, and a low voltage functioning mode is selected and the memory device is not in a stand-by state. Alternatively, the memory device may be in a stand-by state but the datum read from the memory is high. The pre-charge transistor is securely turned off in all other cases.