Pre-sense Amplifiers Stabilize Reference Potentials in Semiconductor Memory

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Solution Overview

Problem

In semiconductor memory devices using twin sense amplifiers, the heavier load on reference bit lines compromises the accuracy of reference potentials, leading to potential data determination errors due to unequal loading on bit lines connected to data and reference cells.

Innovation Solution

The implementation of pre-sense amplifiers that produce output potentials by resistively dividing a power supply voltage based on bit line potentials, which are then used by twin sense amplifiers to determine data, thereby equalizing the load and stabilizing reference potentials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single bit line is used to supply reference potential to all twin sense amplifiers, then the circuit complexity is reduced, but the load on the bit line increases causing accuracy degradation

Engineering Contradiction:
Improvecircuit complexityVSAvoidreference potential accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent divides the single reference bit line into multiple separate bit lines, with each twin sense amplifier having its own dedicated reference bit line. This segmentation reduces the load on each individual bit line, preventing potential depletion and maintaining reference potential accuracy for each sense amplifier independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces pre-sense amplifiers as intermediary components between the memory cell array and the twin sense amplifiers. These pre-sense amplifiers buffer and prepare the reference potentials before they reach the twin sense amplifiers, isolating the sense amplifiers from direct loading effects and maintaining potential stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If reference potential is supplied via a shared bit line to multiple twin sense amplifiers, then the device structure is simplified, but data determination accuracy deteriorates due to load effects

Engineering Contradiction:
Improvedevice structureVSAvoiddata determination accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the shared reference bit line connection into individual dedicated reference bit lines for each twin sense amplifier. This ensures that each sense amplifier receives a stable reference potential without being affected by loading from other amplifiers, thereby maintaining data determination accuracy while keeping the overall device structure organized and manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements pre-sense amplifiers that perform preliminary processing of the reference potentials before they are supplied to the twin sense amplifiers. This preliminary action stabilizes the reference potentials and prepares them for accurate comparison, ensuring reliable data determination before the actual sensing operation occurs.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces data determination errors by ensuring that output potentials from pre-sense amplifiers are independent of bit line loads, maintaining accurate reference potentials and enhancing data reading accuracy.

Implementation Method 1

two first bit lines connected to the first memory cell, and a plurality of second bit lines each connected to one of the plurality of second memory cells; a plurality of pre-sense amplifiers, each configured to produce, in a read operation, an output potential obtained by resistively dividing a power supply voltage based on a potential of one of the two first bit lines or one of the plurality of second bit lines

Methodology Applied
Scientific EffectResistive division: Electrical Resistance

Data Source

PatentUS11158362B2Semiconductor memory device
Publication Date: 2021.10.26 RAMXEED LTD
  • US11158362B2 patent drawing
  • US11158362B2 patent drawing
  • US11158362B2 patent drawing

AI summary

Each pre-sense amplifier produces, in a read operation, an output potential obtained by resistively dividing a power supply voltage based on a potential of one of two first bit lines or one of a plurality of second bit lines. The two first bit lines are connected to a first memory cell holding data of a first and a second logic values. The second bit lines are individually connected to one of a plurality of second memory cells each holding data of the first or the second logic value. Each twin sense amplifier outputs, in the read operation, data determination results based on two reference potentials and a data potential. The two reference potentials are the output potentials produced based on the potentials of the two first bit lines. The data potential is the output potential produced based on the potential of one of the second bit lines.