Precharge Control Circuit for Memory Device Program Performance
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Solution Overview
Problem
Current memory devices face inefficiencies in program performance due to limitations in voltage control during precharge operations, which affect the boosting efficiency of non-selection cell strings and overall data programming in Solid State Drives (SSDs).
Innovation Solution
The implementation of a memory device with a precharge control circuit that manages voltage levels across word lines and bit lines, applying a turn-on voltage to selection and adjacent word lines during precharge, while maintaining a lower voltage for dummy word lines, to enhance precharge efficiency and improve program performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage is applied to all word lines during precharge operation, then precharge coverage is improved, but power consumption increases and program performance deteriorates due to insufficient voltage differentiation
Solution Approach 1:
The patent applies different voltage levels to different word lines based on their selection status. Specifically, a first voltage level is applied to selected word lines while a second, lower voltage level is applied to non-selected word lines during precharge operations. This local differentiation optimizes power consumption by avoiding unnecessary high voltage application to all word lines, while still ensuring reliable precharge for the relevant cell strings.
2Productivity
If turn-on voltage is applied to selection word line and adjacent word line during precharge, then boosting efficiency of non-selection cell strings is improved, but device complexity increases due to additional voltage control requirements
Solution Approach 1:
The patent segments the word lines into different categories based on their role during precharge operations: selected word lines, non-selected word lines, and dummy word lines. Each category receives appropriately differentiated voltage levels. The row decoder is configured to automatically apply the correct voltage levels to each segment, which simplifies the control logic compared to a system that would require individual control of each word line's voltage.
Solution Approach 2:
The patent applies turn-on voltage to the selected word line and its adjacent word line before the actual precharge operation begins. This preliminary voltage application ensures that the cell strings are properly boosted and ready for the precharge operation, improving program performance by ensuring optimal conditions are established in advance.
3Use of energy by moving object
If voltage level is reduced for dummy word lines during precharge, then power consumption is reduced, but precharge effectiveness may deteriorate if voltage is too low
Solution Approach 1:
The patent changes the voltage parameter for dummy word lines during precharge operations, applying a lower voltage level compared to selected and non-selected word lines. This parameter adjustment reduces power consumption for the dummy word lines while the row decoder ensures that the voltage remains sufficient to maintain proper operation. The differentiated voltage levels are carefully controlled to balance power savings with operational effectiveness.
Data Source
AI summary
A memory device includes a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and connected to the memory cell region by the first and second metal pads, and a memory cell array in the memory cell region and including cell strings. The cell strings include memory cells, word lines and dummy lines connected to the memory cells, bit lines connected to one side of the cell strings, and a ground selection line connected to the cell strings. The memory device further includes control logic in the peripheral circuit region and including a precharge control circuit that controls a precharge on partial cell strings among the cell strings and controls data program steps on the memory cells, and a row decoder in the peripheral circuit region that activates at least some of the word lines based on control of the control logic.