Precharge Voltage Reduces Programming Disturb in 3D NAND Memory
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Solution Overview
Problem
In 3D flash NAND memory devices, the common word lines used for programming selected memory cells can cause programming disturb effects in unselected memory cells, leading to incorrect data readouts or data loss.
Innovation Solution
Applying an additional precharge voltage of 2-3V to the channel material of memory cells during the precharge portion of a programming operation, which allows the use of higher programming voltages required for stubborn memory cells while reducing the incidence of programming disturb effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If higher programming voltages are applied to program stubborn memory cells, then programming completeness is improved, but programming disturbance effects in unselected cells increase
Solution Approach 1:
The patent applies a preliminary pass voltage to unselected word lines before applying the programming voltage to selected word lines. This preliminary action prepares the unselected memory cells by setting their channel material to a specific potential, which reduces the impact of subsequent programming voltages on these cells. The pass voltage is applied in advance to prevent programming disturbance before the harmful effect can occur.
Solution Approach 2:
The patent applies different voltages to different word lines based on their selection status. Selected word lines receive the full programming voltage necessary to program stubborn memory cells, while unselected word lines receive a reduced pass voltage. This local differentiation allows the system to maintain programming completeness for selected cells while minimizing programming disturbance in unselected cells.
2Quantity of substance
If common word lines are used for high density memory configuration, then memory density is improved, but programming disturbance to unselected cells increases
Solution Approach 1:
The patent implements local quality control by applying different voltage levels to different word lines within the same memory block. Unselected word lines receive a pass voltage that maintains their channel material at a safe potential, while selected word lines receive the full programming voltage. This approach enables high density memory configurations with common word lines while protecting unselected cells from programming disturbance.
Solution Approach 2:
The patent applies a preliminary pass voltage to unselected word lines that creates a protective effect against subsequent programming voltages. This preliminary anti-action establishes a voltage state in the unselected cells that counteracts the harmful effects of the programming voltage applied to selected cells sharing the same block, thereby preventing programming disturbance while maintaining high memory density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The precharge voltage method effectively reduces the occurrence of programming disturb effects, allowing for the use of higher programming voltages necessary to program all memory cells while maintaining data integrity in unselected cells.
Implementation Method 1
Applying an additional precharge voltage of 2-3V to the channel material of memory cells during the precharge portion of a programming operation
Data Source
AI summary
Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a block of memory cells to a precharge voltage during a first portion of a programming operation. A programming voltage can then be applied to a selected memory cell in a selected sub-block of the block of memory cells during a second portion of the programming operation. The selected memory cell is coupled to a same access line as an unselected memory cell in the unselected sub-block. Additional methods and apparatus are disclosed.


