Pre-Charged Digital-to-Time Converter for Lower Comparator Jitter
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Solution Overview
Problem
Fractional output dividers (FODs) face performance issues due to random jitter, primarily caused by noise at the comparator, which is affected by the slope of the voltage ramp, and existing methods to increase the slope either reduce ramp time or increase target voltage, both of which have limitations that can worsen jitter.
Innovation Solution
Incorporating a pre-charge circuit in the digital-to-time converter (DTC) to generate a negative voltage at the comparator input before the voltage ramp starts, increasing the slope without reducing ramp time or increasing target voltage, thereby reducing noise and jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the slope of the voltage ramp is increased to reduce comparator noise and jitter, then measurement precision improves, but either ramp time is reduced or target voltage is increased, both of which can worsen jitter
Solution Approach 1:
The pre-charge circuit performs preliminary action by charging the capacitor to a negative voltage before the main voltage ramp begins. This initial negative voltage level allows the subsequent ramp to achieve a steeper effective slope without reducing the total ramp time, thereby reducing comparator noise and jitter while maintaining adequate timing duration
Solution Approach 2:
The invention changes the voltage parameter by introducing a negative pre-charge voltage level before the main ramp. This parameter change creates a larger voltage swing during the ramp phase, effectively increasing the slope without compromising ramp time, thus resolving the contradiction between measurement precision and time loss
2Measurement precision
If the slope of the voltage ramp is increased to reduce comparator noise and jitter, then measurement precision improves, but target voltage must be increased, which can worsen jitter
Solution Approach 1:
The pre-charge circuit performs preliminary action by establishing a negative voltage baseline before the main ramp operation. This allows the voltage ramp to traverse a larger voltage range with steeper slope without increasing the final target voltage, thereby reducing jitter through improved measurement precision while maintaining system reliability
Solution Approach 2:
The invention applies parameter changes by introducing a negative pre-charge voltage level, which transforms the voltage ramp characteristics. This enables steeper effective slope for better measurement precision without increasing the peak target voltage, thus resolving the contradiction between measurement precision and reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The pre-charge circuit reduces random jitter by approximately 30% by starting the voltage ramp at a negative voltage, enhancing the slope and minimizing noise at the comparator, thus improving the accuracy of the timing signal.
Implementation Method 1
The capacitor has a first capacitor electrode and a second capacitor electrode. The first capacitor electrode is coupled to the charge node. A first voltage ramp is generated at the first electrode of the first capacitor in response to charging the first capacitor with a current
Implementation Method 2
A second capacitor is charged with a pre-charge current during the third period of time to generate a negative pre-charge voltage at the input of the comparator during a fourth period of time
Implementation Method 3
The comparator has a first comparator input, a second comparator input, and a comparator output. The first comparator input is coupled to the charge node, the second comparator input is coupled to a reference voltage terminal
Data Source
AI summary
A digital-to-time converter (DTC) circuit. The DTC circuit includes a charge node. A variable current source has a source input and a source output. The source input is coupled to a DTC digital input and the source output is coupled to the charge node. A capacitor has a first capacitor electrode and a second capacitor electrode. The first capacitor electrode is coupled to the charge node. A comparator has a first comparator input, a second comparator input, and a comparator output. The first comparator input is coupled to the charge node, the second comparator input is coupled to a reference voltage terminal, and the comparator output is coupled to a DTC output. A pre-charge circuit has a pre-charge control input and a pre-charge output. The pre-charge control input is coupled to a DTC pre-charge input and the pre-charge output is coupled to the capacitor.