Precision-Gated MAC Circuits for Low-Power CIM
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional MAC circuits consume excessive power and slow down performance due to activating all components during lower-precision floating-point operations, despite many components being unnecessary.
Innovation Solution
Implement control circuits that selectively deactivate portions of the MAC circuit based on the required precision, using precision control signals to manage power and clock signals, thereby optimizing component usage for lower-precision operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If all components of the MAC circuit are activated during lower-precision floating-point operations, then the circuit can maintain full computational capability, but power consumption increases and performance decreases
Solution Approach 1:
The patent implements dynamic activation of MAC circuit components based on the precision requirements of floating-point operations. The circuit transitions from a static fully-active state to a dynamic state where only necessary components are activated, allowing the system to adapt its configuration according to operational needs and reduce power consumption while maintaining performance.
Solution Approach 2:
The MAC circuit is divided into multiple independently controllable components or blocks. This segmentation allows the control circuit to selectively deactivate specific portions of the MAC circuit based on the precision requirements, rather than deactivating the entire circuit, thereby optimizing the balance between power consumption and computational capability.
2Measurement precision
If all components of the MAC circuit are activated, then full precision calculations can be performed, but unnecessary components waste power and reduce clock speed
Solution Approach 1:
The patent dynamically adjusts the activation state of MAC components based on the precision requirements of the current operation. When lower-precision operations are detected, the control circuit deactivates unnecessary high-precision components, allowing the remaining active components to operate at higher clock speeds, thus improving overall performance.
Solution Approach 2:
Different portions of the MAC circuit are treated differently based on their necessity for the current operation. The control circuit applies local quality by selectively activating only those components required for the specific precision level being used, rather than uniformly activating all components, thereby optimizing both precision capability and operational speed.
3Adaptability or versatility
If the MAC circuit is designed for high precision operations, then it can handle complex calculations, but it consumes excessive power during simple lower-precision operations
Solution Approach 1:
The patent implements a dynamic control mechanism that adapts the MAC circuit configuration based on the precision requirements of incoming operations. The control circuit continuously monitors operation characteristics and adjusts component activation accordingly, enabling the circuit to maintain high adaptability across different precision levels while significantly reducing power consumption during lower-precision operations.
Solution Approach 2:
The MAC circuit is designed with multi-functionality, capable of supporting multiple precision levels through a single unified architecture. The control circuit enables this universality by dynamically configuring which components are active, allowing the same hardware to efficiently handle both high-precision and low-precision operations without requiring separate dedicated circuits for each precision level.
Data Source
AI summary
A system and method of operating the system are disclosed. In one aspect, a system includes a memory circuit storing data for a compute-in-memory (CIM) operation. The system includes an adder circuit receiving a plurality of inputs from a plurality of input devices and the memory circuit. The system includes a comparison circuit configured to receive a configuration input and generate a disable signal, the disable signal configured to disable at least a portion of the adder circuit during the CIM operation.


