Predictive DFE Dual-Path Circuit for Precursor Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional signal processing systems face challenges in correcting pre-cursors without boosting high-frequency noise, leading to suboptimal signal-to-noise ratio (SNR) and bit error rate (BER) in receivers.

Innovation Solution

A predictive decision feedback equalizer (DFE) system is implemented, comprising main and auxiliary path circuitry, where the auxiliary path nullifies noise boosting by the main path FFE, improving SNR and BER through inverse function implementation and delayed signal processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional FFE processes past, present and future signal vectors to correct pre-cursors, then pre-cursor correction is achieved, but high-frequency noise is boosted

Engineering Contradiction:
Improvepre-cursor correction capabilityVSAvoidhigh-frequency noise boosting
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The equalizer is divided into two separate paths: a main path (FFE+DFE) for pre-cursor correction and an auxiliary path (auxiliary FFE+auxiliary DFE) for noise suppression. Each path processes the signal independently and their outputs are combined, allowing functional separation of correction and noise mitigation tasks

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The auxiliary path acts as an intermediary that processes a delayed version of the input signal and subtracts its output from the main path output. This intermediary path provides noise suppression without interfering with the primary pre-cursor correction function of the main path

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If auxiliary path implements inverse function of main-path FFE, then high-frequency noise boosting is nullified, but signal-to-noise ratio requires complex processing

Engineering Contradiction:
Improvehigh-frequency noise suppressionVSAvoiddual-path circuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The auxiliary FFE implements an inverse function of the main-path FFE, designed to nullify the noise boosting effect. By inverting the frequency response characteristics of the main path, the auxiliary path cancels out high-frequency noise amplification when their outputs are combined

Inventive Principle:
Principle #13The other way round (Inversion)

3Adaptability or versatility

If delay circuitry delays auxiliary path by q-cycles, then future symbols are available for processing, but processing time is increased

Engineering Contradiction:
Improvefuture symbol availabilityVSAvoidprocessing delay
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The auxiliary path processes a delayed version of the input signal by q-cycles, allowing future symbols (dn+1 to dn+q) to be available when needed. This preliminary delay enables the auxiliary DFE to access prospective future symbols that the main-path DFE cannot see, improving noise suppression capability

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10666469B2Predictive decision feedback equalizer
Publication Date: 2020.05.26 MAXLINEAR INC
  • US10666469B2 patent drawing
  • US10666469B2 patent drawing
  • US10666469B2 patent drawing

AI summary

A digital signal processing circuit comprises a first equalizer circuit and a second equalizer circuit. An output of the second equalizer is used as feedback to generate an equalized signal. The output of the second equalizer circuit is based on a plurality of postcursor values and a plurality of precursor values, where the precursor values are generated based on an output of the first DFE circuit, and the postcursor values are generated independently of the output of the first DFE.