Delay Line Applications TRIZ Cases
- 3D Signal Delay Line Layout for Compact PCB Footprints
Vertical signal electrodes, grooves, and impedance matching cut coupling and insertion loss while shrinking delay line PCB area.
- Adaptive Oscillator Clocking for Fast Voltage-Droop Frequency Shifts
An adaptive oscillator changes clock frequency from droopy-versus-regulated voltage differences to cut latency and power in state transitions.
- Processor Voltage Regulation With DFLL Response to Voltage Droop
Adaptive DFLL clock reduction and programmable regulator settings help processors ride through burst-load voltage droop without failure.
- Programmable Voltage Regulation for Processor Voltage Droop
A programmable load line lets an external regulator and DFLL react to current spikes, limiting voltage droop without large on-die circuits.
- Semiconductor Bias Compensation for BTI Threshold Drift
A degradation detection circuit adjusts bias and gate voltages to counter BTI threshold shifts and keep semiconductor performance stable.
- Degradation Detection Circuit for BTI Threshold Voltage Compensation
A feedback circuit detects BTI-driven threshold shifts and adjusts bias and gate voltages to maintain semiconductor performance over time.