Prepreg Thermal Stress Suppression for Warpage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional board materials for electronic devices, such as those described in International Publication No. WO 2012/099134, fail to sufficiently suppress warpage due to thermal expansion differences, leading to bonding reliability issues between semiconductor chips and boards.
Innovation Solution
A prepreg comprising a half-cured thermosetting resin composition and a fibrous substrate, with controlled thermal stress, is developed to suppress warpage by limiting thermal shrinkage and expansion stresses to 400 kPa or less, incorporating epoxy resin, polyimide resin, or polyphenylene oxide, and optionally inorganic fillers, to maintain bonding reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If board thickness is reduced to satisfy size and thickness requirements, then electronic device size and thickness are reduced, but warpage generation increases
Solution Approach 1:
The patent applies parameter changes by carefully controlling the glass transition temperature (Tg) of the resin composition to be 70°C or higher, and adjusting the ratio of rigid chain polysiloxane (0.1-10 parts by mass per 100 parts by mass of total polysiloxane). These parameter optimizations enable thin boards to maintain dimensional stability and suppress warpage while meeting size reduction requirements
Solution Approach 2:
The patent uses composite materials by combining rigid chain polysiloxane with flexible chain polysiloxane in a specific ratio. This composite approach leverages the high rigidity and low thermal expansion of rigid chains while using flexible chains to maintain processability and reduce internal stress, thereby suppressing warpage in thin boards
2Reliability
If conventional resin compositions are used, then manufacturing is simpler, but warpage suppression is insufficient leading to bonding reliability degradation
Solution Approach 1:
The patent achieves reliable warpage suppression by optimizing specific parameters: Tg ≥ 70°C, rigid chain polysiloxane content (0.1-10 parts per 100 parts total polysiloxane), and optional inorganic filler addition (10-50 wt%). These controlled parameter changes improve bonding reliability without requiring overly complex formulation processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The prepreg effectively suppresses warpage in electronic devices, ensuring reliable bonding between semiconductor chips and boards by managing thermal stresses, thereby enhancing the stability and integration of electronic components.
Implementation Method 1
due to a difference in coefficient of thermal expansion (CTE) between the semiconductor chip and the board, deformation such as warpage of a package sometimes occurs by a change in temperature
Implementation Method 2
measured for tensile stress between the jigs that is defined as thermal shrinkage stress. The tensile stress is measured during a period which a temperature of the prepreg test piece is lowered from 260° C. to normal temperature after the prepreg test piece is heated to a temperature of 260° C.
Data Source
AI summary
A prepreg includes a resin layer constituted by a half-cured product of a thermosetting resin composition, and a fibrous substrate provided in the resin layer. A prepreg test piece that is a cured product obtained by heat curing the thermosetting resin composition has a maximum value of 400 kPa or less for thermal shrinkage stress measured by a predetermined thermal stress test.