Pre-Sampling MDAC Circuit for Low-Power Pipelined ADCs

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Solution Overview

Problem

Existing pipelined ADCs are susceptible to component mismatch and circuit imperfections, leading to high power consumption and the need for background calibration, while conventional MDACs lack efficiency in converting analog signals to digital signals over a wide range of frequencies and signal magnitudes with minimal noise and distortion.

Innovation Solution

A multiplying digital-to-analog converter (MDAC) with pre-sampling and an associated pipelined analog-to-digital converter (ADC) that utilizes pre-sampling capacitors to achieve reference voltage subtraction and input voltage amplification, reducing power consumption and eliminating the need for background calibration by using an operational amplifier without a tail current source and suppressing common-mode offset.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If typical pipelined ADCs use switched capacitor circuits and active circuits like operational amplifiers to achieve multiplication and addition/subtraction of charges, then conversion functionality is improved, but susceptibility to component mismatch and circuit imperfections increases

Engineering Contradiction:
Improveconversion functionalityVSAvoidsusceptibility to component mismatch
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent extracts and removes the tail current source from the operational amplifier circuit. This elimination of the tail current source reduces the number of critical components that can cause mismatch, thereby improving reliability while maintaining the core multiplication and addition/subtraction functionalities through switched capacitor circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

2Speed

If high gain and high speed operational amplifiers are employed in typical pipelined ADCs, then conversion speed and accuracy are improved, but power consumption increases

Engineering Contradiction:
Improveconversion speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent removes the tail current source from the operational amplifier, which directly reduces power consumption. The operational amplifier is designed without a tail current source, eliminating a major power consumption pathway while maintaining adequate gain and speed performance for the pipelined ADC operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses pre-sampling capacitors to perform partial conversion work before the main conversion stage. By pre-sampling and holding voltages on capacitors, the operational amplifier needs to perform less work during the actual conversion, reducing its power consumption while maintaining conversion speed.

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If conventional MDACs are used without pre-sampling, then circuit simplicity is maintained, but conversion efficiency over wide frequency and signal magnitude ranges deteriorates

Engineering Contradiction:
Improvecircuit simplicityVSAvoidconversion efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent introduces pre-sampling capacitors that perform preliminary sampling and voltage holding before the main conversion process. This preliminary action prepares the input signals in advance, enabling the MDAC to handle wide frequency and signal magnitude ranges more efficiently without significantly increasing overall circuit complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3813263B1Multiplying digital-to-analog converter with pre-sampling and associated pipelined analog-to-digital converter
Publication Date: 2025.08.06 MEDIATEK INC
  • EP3813263B1 patent drawingFigure 1
  • EP3813263B1 patent drawingFigure 2
  • EP3813263B1 patent drawingFigure 3

AI summary

A multiplying digital-to-analog converter (MDAC) includes an operational amplifier, a sampling capacitor circuit, a pre-sampling capacitor circuit, and a switch circuit. During a sampling cycle, the switch circuit connects a pre-defined voltage and reference voltages to the pre-sampling capacitor circuit, disconnects the pre-sampling capacitor circuit from an input port of the operational amplifier and the sampling capacitor circuit, disconnects an output port of the operational amplifier from the sampling capacitor circuit, and connects a voltage input to the sampling capacitor circuit. During a conversion cycle, the switch circuit connects the pre-sampling capacitor circuit to the sampling capacitor circuit, disconnects the pre-defined voltage and the reference voltages from the pre-sampling capacitor circuit, connects the pre-sampling capacitor circuit to the input port of the operational amplifier, connects the output port of the operational amplifier to the sampling capacitor circuit, and disconnects the voltage input from the sampling capacitor circuit.