Pre-sealed Semiconductor Packages for Power Modules
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Solution Overview
Problem
The existing methods for manufacturing electronic devices with semiconductor modules, particularly power conversion circuits, face inefficiencies in manufacturing efficiency and reliability due to the direct mounting of semiconductor chips on substrates, which complicates the connection of conductive members and sealing processes.
Innovation Solution
The use of semiconductor packages that are pre-sealed with resin, allowing for improved manufacturing efficiency and reliability by pre-connecting conductive members to chip electrodes before mounting on a substrate, and optimizing the layout and composition of these packages to reduce inductance and impedance in the transmission paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor chips are directly mounted on substrate, then device size is reduced, but manufacturing efficiency and reliability deteriorate due to complex connection and sealing steps
Solution Approach 1:
The patent applies preliminary action by pre-connecting conductive members to chip electrodes and pre-sealing semiconductor chips with resin before mounting on the substrate. This preliminary preparation of semiconductor chips simplifies the subsequent mounting process, improves manufacturing efficiency, and maintains compact device size while enhancing reliability.
2Volume of moving object
If semiconductor chips are directly mounted on substrate, then device size is reduced, but reliability deteriorates due to complex connection steps
Solution Approach 1:
The patent applies preliminary action by pre-connecting conductive members to chip electrodes and pre-sealing semiconductor chips with resin before mounting on the substrate. This preliminary preparation of semiconductor chips simplifies the subsequent mounting process, improves manufacturing efficiency, and maintains compact device size while enhancing reliability.
3Productivity
If package mounting method is used, then manufacturing efficiency and reliability are improved, but device complexity increases due to additional packaging steps
Solution Approach 1:
The patent applies merging by integrating the semiconductor chip, conductive members, and resin sealing into a single pre-assembled semiconductor package unit. This combined structure simplifies the overall device assembly process while maintaining manufacturing efficiency and reliability benefits of the package mounting method.
4Ease of manufacture
If conventional layout is used, then manufacturing is simple, but electrical characteristics deteriorate due to high inductance and impedance
Solution Approach 1:
The patent applies local quality by optimizing the layout of conductor tracks and semiconductor packages specifically in regions where electrical connections are made. This localized optimization reduces inductance and impedance in critical current paths while maintaining overall manufacturing simplicity.
Data Source
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AI summary
Each of first and second semiconductor devices mounted on a substrate includes an emitter terminal electrically connected with a front surface electrode of a semiconductor chip and exposed from a main surface of a sealing body located on a front surface side of the semiconductor chip. Each of the first and second semiconductor devices includes a collector terminal electrically connected with a back surface electrode of the semiconductor chip and exposed from the main surface of the sealing body located on a back surface side of the semiconductor chip. The collector terminal of the first semiconductor device is electrically connected with the emitter terminal of the second semiconductor device via a conductor pattern formed on an upper surface of the substrate.