SoC Component Throttling by Priority for Power and Thermal Budgets
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Solution Overview
Problem
Modern computing devices face challenges in managing power and thermal budgets due to shrinking component sizes and increased integration, with conventional SoCs lacking mechanisms to prioritize throttling of non-computing IP blocks and extend throttling to various IP blocks to stay within power and thermal limits.
Innovation Solution
Assigning throttling priorities to components based on their importance, allowing domains to be throttled in a descending order of priority and un-throttled in ascending order, with a constraint headroom parameter determining when to throttle or un-throttle domains to maintain power and thermal budgets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If DVFS is employed to scale voltage and frequency to meet power and thermal budget, then power and thermal constraints are satisfied, but component performance is reduced
Solution Approach 1:
The system segments the SoC into multiple domains (compute domain and non-compute domain) with independent throttling control. Each domain can be throttled separately based on its priority level, allowing selective performance reduction in non-critical domains while maintaining performance in critical domains, thus resolving the contradiction between power savings and overall system performance.
Solution Approach 2:
The patent implements local quality by assigning different throttling priorities to different domains. The compute domain can be assigned higher priority to maintain performance during throttling events, while non-compute domains receive lower priority and are throttled more aggressively. This localized differentiation allows the system to satisfy power constraints while preserving critical performance characteristics.
2Adaptability or versatility
If more components are integrated into shrinking device size, then device functionality increases, but power and thermal budget per component decreases
Solution Approach 1:
The patent implements dynamic throttling where the operating characteristics of integrated components are adjusted in real-time based on system-wide power and thermal conditions. The throttling logic continuously monitors power consumption and thermal status, dynamically scaling down non-critical domains while maintaining critical functions, enabling the system to support high component integration within limited power budgets.
3Use of energy by stationary object
If conventional SoC throttling mechanisms are used, then power budget is maintained, but non-compute IP blocks cannot be prioritized or extended for throttling
Solution Approach 1:
The patent extends the throttling mechanism to be universal across all IP blocks in the SoC, not just compute domains. The same throttling infrastructure and control logic can be applied to compute domains, non-compute domains, and individual IP blocks, providing a unified approach to power management that works across diverse component types while maintaining power budget control.
Data Source
AI summary
An apparatus is provided, where the apparatus includes a plurality of components, wherein an individual component has a corresponding throttling priority of a plurality of throttling priorities. The apparatus further includes logic to selectively throttle one or more of the plurality of components. In an example, an order in which the one or more of the plurality of components are to be throttled may be based on the plurality of throttling priorities.