Processor Access Module for External Cache Control

Solution Overview

Problem

Existing computing processors have cache memories that are not externally accessible or controllable without executing computing instructions, leading to delayed access and lack of external observability.

Innovation Solution

A processor access module that receives data commands from external agents and performs cache operations on the cache memory, allowing external access and control through a slave bus controller and cache operation controller.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If computing instructions are executed to access data in cache memory, then data access is enabled, but access time is delayed due to instruction retrieval requirements

Engineering Contradiction:

Improvedata access capabilityVSAvoidaccess time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces a specialized cache access interface that acts as an intermediary between external agents and the cache memory. This interface allows direct data access without requiring execution of computing instructions, thereby eliminating the time delay associated with instruction retrieval while maintaining reliable data access capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If cache memory is used to store data, then access speed is improved, but external observability and control are lost

Engineering Contradiction:

Improvedata access speedVSAvoidexternal observability

Core Design Contradiction:

SpeedVSEase of operation

Solution Approach 1:

The patent introduces a specialized cache access interface that acts as an intermediary between external agents and the cache memory. This interface maintains the fast access speed of cache memory while simultaneously enabling external agents to observe and control cache data directly, thus resolving the contradiction between speed and external observability.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Speed

If cache memory is used to store data, then access speed is improved, but external control capability is lost

Engineering Contradiction:

Improvedata access speedVSAvoidexternal control capability

Core Design Contradiction:

SpeedVSAdaptability or versatility

Solution Approach 1:

The patent introduces a specialized cache access interface that acts as an intermediary between external agents and the cache memory. This interface maintains the fast access speed of cache memory while simultaneously enabling external agents to observe and control cache data directly, thus resolving the contradiction between speed and external control capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS7353345B1External observation and control of data in a computing processor

Publication Date: 2008.04.01 INTEGRATED DEVICE TECH INC

AI summary

A processor access module receives a data command from an agent located externally of a computing processor and performs a cache operation on a cache memory in the computing processor based on the data command. Alternatively, the processor access module receives a data command from the agent and performs a cache operation on the cache memory based on the data command to store a computer program into the cache memory. The processor access module then receives a boot command from the agent and boots the computing processor to initiate execution of the computer program.