Processor Internal Memory for DNN Convolution
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Solution Overview
Problem
The limited internal memory capacity in processors hampers efficient processing of deep neural networks (DNNs) due to the need for frequent communication with external memory, leading to increased processing time for input data.
Innovation Solution
A processor with a memory and a convolution calculation unit, controlled by a controller, efficiently processes data by storing and retrieving data within the internal memory, performing convolution calculations based on kernel data, and managing data storage and retrieval to minimize reliance on external memory bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in external memory for DNN processing, then the processor can access large capacity storage, but the processing time increases due to communication overhead with external memory
Solution Approach 1:
The patent segments the memory system into internal memory (within processor) and external memory, with the internal memory specifically allocated to store kernel data and intermediate calculation results. This segmentation allows frequently accessed data to be kept close to the processing unit, reducing external memory access frequency and time while maintaining the ability to access large external storage when needed.
Solution Approach 2:
The patent implements preliminary action by pre-loading kernel data into the internal memory before the actual DNN processing begins. This preparation ensures that essential data is already available in fast internal memory, eliminating the need for repeated external memory access during processing and thereby reducing overall processing time.
2Productivity
If internal memory capacity is increased to store more DNN data, then processing speed improves, but the device complexity and cost increase
Solution Approach 1:
The patent applies local quality by allocating internal memory specifically for storing kernel data and intermediate results that are locally required for processing, rather than uniformly increasing overall memory capacity. This targeted allocation optimizes processing speed for DNN operations without unnecessarily increasing device complexity or cost across the entire system.
Solution Approach 2:
The patent implements partial action by providing internal memory capacity that is sufficient for storing kernel data and intermediate results needed for processing, rather than providing excessive memory capacity. This approach achieves the necessary processing speed improvement without the diminishing returns and increased complexity that would result from over-provisioning memory.
3Quantity of substance
If data is frequently transferred between external memory and processor, then the processor can handle large datasets, but the communication overhead increases processing time
Solution Approach 1:
The patent introduces internal memory as an intermediary between external memory and the processing unit. Kernel data and intermediate calculation results are first transferred to this intermediary internal memory, where they can be accessed rapidly during processing. This intermediary layer reduces the frequency and volume of direct communications between the processor and external memory, thereby reducing communication overhead and processing time while still enabling handling of large datasets.
Data Source
AI summary
Disclosed is an electronic apparatus which executes an artificial intelligence algorithm using a convolution calculation unit and memory local to the electronic apparatus.